Department of Electronic Engineering T.E, Alexander Technological & Educational Institute of Thessaloniki, Thessaloniki, Greece
Department of Electronic Engineering T.E, Alexander Technological & Educational Institute of Thessaloniki, Thessaloniki, Greece
Department of Electronic Engineering T.E, Alexander Technological & Educational Institute of Thessaloniki, Thessaloniki, Greece
Copyright © 2014 Papakostas K. Dimitrios, Pouros P. Sotirios, Vassios D. Vassilios et al. This is
an open access article distributed under the Creative Commons Attribution
License, which permits unrestricted use, distribution, and reproduction in any
medium, provided the original work is properly cited.
How to Cite this Article
Dimitrios, P. , Sotirios, P. and Vassilios, V. (2014) Fault Tolerance Limits and Input Stimulus Selection Using an Implemented FPGA-Based Testing System.
Journal of Computer and Communications,
2, 18-24. doi:
10.4236/jcc.2014.213003.