Output Voltage Stabilization of Non-Ideal DC-DC Zeta Converter with Output Voltage Error Elimination via Hybrid Control

Hafez Sarkawi¹, Noridah Mohd Ridzuan², Muhammad Idzdihar Idris¹, Mohd Syafiq Mispan¹

¹Fakulti Teknologi dan Kejuruteraan Elektronik dan Komputer, Universiti Teknikal Malaysia Melaka, Melaka, Malaysia.
²Proton Advanced Automotive Technology Institute, Melaka, Malaysia.

DOI: 10.4236/jpee.2025.131002                

Abstract

In this paper, we proposed an output voltage stabilization of a DC-DC Zeta converter using hybrid control. We modeled the Zeta converter under continuous conduction mode operation. We derived a switching control law that brings the output voltage to the desired level. Due to infinite switching occurring at the desired level, we enhanced the switching control law by allowing a sizeable output voltage ripple. We derived mathematical models that allow one to choose the desired switching frequency. In practice, the existence of the non-ideal properties of the Zeta converter results in steady-state output voltage error. By analyzing the power loss in the zeta converter, we proposed an improved switching control law that eliminates the steady-state output voltage error. The effectiveness of the proposed method is illustrated with simulation results.

Keywords

Continuous Conduction Mode, DC-DC Zeta Converter, Hybrid Control, Output Voltage Error, Switching Control Law, Switching Frequency

1. Introduction

Energy harvesting systems have a power management system that includes a DC-DC converter. Because of the uncertain nature of the ambient energy, for example, low or high irradiance of the sun and fluctuation of the wind speed, the voltage generated by the energy harvester, which is connected to the input of the DC-DC converter, can possibly be higher or lower than the output voltage. For that reason, the fourth-order DC-DC converter is a good candidate for deployment since it has step-up or step-down capability. There are a few topologies available, and the selection of a suitable topology is based on the intended application. With a smartphone battery charging application in mind where a solar panel gives the input, a suitable topology is the Zeta topology due to two reasons: 1) positive output voltage and low output voltage ripple, 2) natural DC input-to-output voltage isolation. The DC input in the zeta is disconnected/isolated from the output part in one of the two operation modes, precisely when the transistor is turned off. This isolation is beneficial, especially in uncertain solar energy sources, since it can reduce the effect of input voltage fluctuations.

There are several pulse width modulation (PWM)-based control techniques presented in the literature to control the DC-DC converter. The one most widely used is proportional integral (PI) control [1]-[5]. Although PI control produces fast output voltage regulation, it suffers from high control effort for the control duty-ratio [6] which can cause problems to the PWM circuitry. Another well-known controller is optimal control [6]-[11]. Conventional optimal linear quadratic regulator (LQR) control [6] [7] produces optimal compensation with minimal control effort. The downside, however, is that when the parameters have high uncertainty, the controller loses the capability to regulate the output. In [8]-[12], the authors consider the uncertainties in control design formulation and the controller can cope with large uncertainties at the expense of lower performance in nominal conditions. Other types of PWM-based controllers are sliding-mode [13]-[15], fuzzy [16] [17], adaptive [18] [19], and fuzzy-neural [20] [21], to name a few. The main disadvantage of the PWM-based controller is the high inrush current at the inductor during start-up due to the high switching frequency.

Hybrid control is a variable switching frequency type of controller. Hybrid control produces a low switching frequency at start-up; thus, the inrush current can be kept small. In [22]-[29], the authors used hybrid control to regulate the output voltage of buck [22], boost [23] [24] and buck-boost [25] converter by observing the relation between output voltage ripple and inductor current ripple. The fact that zeta topology has a very low output voltage ripple makes this method unsuitable. Control Lyapunov-based hybrid control is presented in [26]-[29]. Even though the output voltage is stabilized, the authors do not consider non-ideal conditions thus the output voltage error is not eliminated. In this paper, we propose hybrid control and consider non-ideal Zeta converter by including the transistor on resistance, equivalent series resistance for the two inductors, and forward voltage drop of the diode. By relating to the non-ideal condition and power loss, we introduced an improved hybrid control strategy that not only stabilized the Zeta converter, but also removed the steady-state output voltage error.

The remainder of the paper is organized as follows: In Section 2, we show the DC-DC Zeta converter modeling. In Section 3, we formulate a hybrid control strategy for the ideal and non-ideal Zeta converter. A design example and simulation results are given in Section 4. Lastly, in Section 5, we conclude our work.

Figure 1. DC-DC Zeta converter circuit.

(a) (b)

Figure 2. DC-DC Zeta converter equivalent circuit for (a) Mode 1, and (b) Mode 2.

2. DC-DC Zeta Converter CCM Model

Consider the DC-DC Zeta converter circuit shown in Figure 1. The circuit consists of two inductors $L_1$ and $L_2$ , two capacitors $C_1$ and $C_2$ , an ideal diode $d$ and $C_2$ , a DC voltage source $v_g$ , a resistive load $R$ , and an ideal switch $S$ . Denote the currents of $L_1$ and $L_2$ as $i_{L1}$ and $i_{L2}$ , the voltages of $C_1$ and $C_2$ as $v_{C1}$ and $v_{C2}$ , respectively. Consider continuous conduction mode (CCM) operation of the converter. When the switch is closed (Mode 1), the converter is equivalent to the circuit shown in Figure 2(a), and when the switch is open (Mode 2), the converter is equivalent to the circuit shown in Figure 2(b). The state-space equation for the DC-DC Zeta converter is constructed using the state vector [29]

$x=\left[\begin{array}{c}{i}_{L1}\\ i_{L2}\\ v_{C1}\\ v_{C2}\end{array}\right]$ ,

and the input $u=v_g$ :

$\frac{\text{d}x}{\text{d}t}=A_{k}x+B_{k}u$ ,(1)

where $k=1,2$ represents the operation mode; $k=1$ if the switch is closed (Mode 1) and $k=2$ if the switch is open (Mode 2):

$A_1=\left[\begin{array}{cccc}0& 0& 0& 0\\ 0& 0& \frac{1}{L_2}& -\frac{1}{L_2}\\ 0& -\frac{1}{C_1}& 0& 0\\ 0& \frac{1}{C_2}& 0& -\frac{1}{R{C}_2}\end{array}\right]$ , $B_1=\left[\begin{array}{c}\frac{1}{L_1}\\ \frac{1}{L_2}\\ 0\\ 0\end{array}\right]$ ,(2)

$A_2=\left[\begin{array}{cccc}0& 0& -\frac{1}{L_1}& 0\\ 0& 0& 0& -\frac{1}{L_2}\\ \frac{1}{C_1}& 0& 0& 0\\ 0& \frac{1}{C_2}& 0& -\frac{1}{R{C}_2}\end{array}\right]$ , $B_2=\left[\begin{array}{c}0\\ 0\\ 0\\ 0\end{array}\right]$ ,(3)

With the DC-DC Zeta converter model having been presented, the formulation of the switching control is addressed in the next section.

3. Hybrid Switching Control Formulation

The aim of the control is to design the switching law of $S$ in such a way that the voltage of the load $R$ becomes a prescribed value $v_{ref}$ . For the DC-DC Zeta converter case, the steady-state operation point [29] is given by

$x^{*}=\left[\begin{array}{c}{i}_{L1}^{*}\\ i_{L2}^{*}\\ v_{C1}^{*}\\ v_{C2}^{*}\end{array}\right]=\left[\begin{array}{c}\frac{v_{ref}^2}{R{v}_g}\\ \frac{v_{ref}}{R}\\ v_{ref}\\ v_{ref}\end{array}\right]$ .(4)

3.1. Ideal DC-DC Zeta Converter Control

Choose a control Lyapunov function (CLF) candidate

$V\left(x\right)={\left(x-x^{*}\right)}^{\text{T}}P\left(x-x^{*}\right)$ , $P=\text{diag}\left\{\frac{L_1}{2},\frac{L_2}{2},\frac{C_1}{2},\frac{C_2}{2}\right\}$ .(5)

Let ${\alpha }_1\left(x\right)$ and ${\alpha }_2\left(x\right)$ be the derivative along the trajectory under Mode 1 and Mode 2, respectively. Then

${\alpha }_1\left(x\right)=-\frac{1}{R}{\left(v_{C2}^{*}-v_{C2}\right)}^2+v_g\left(i_{L1}-i_{L1}^{*}\right)+v_g\left(i_{L2}-i_{L2}^{*}\right)-\frac{v_{ref}}{R}\left(v_{C1}-v_{C1}^{*}\right)$ ,(6)

${\alpha }_2\left(x\right)=-\frac{1}{R}{\left(v_{C2}^{*}-v_{C2}\right)}^2-\frac{v_{ref}}{v_g}\left(v_g\left(i_{L1}-i_{L1}^{*}\right)+v_g\left(i_{L2}-i_{L2}^{*}\right)-\frac{v_{ref}}{R}\left(v_{C1}-v_{C1}^{*}\right)\right)$ .(7)

Based on the CLF (5), we define the switching control law as follows:

Switching Control Law 1

When the current mode is Mode 1, if ${\alpha }_1\left(x\right)<0$ , then stay in Mode 1, otherwise change to Mode 2. When the current mode is Mode 2, if ${\alpha }_2\left(x\right)<0$ , then stay in Mode 2, otherwise change to Mode 1.

Direct implementation of Switching Control Law 1 however induces infinite switching at the operating point which is impossible in practice. To overcome this problem, we propose an improved Switching Control Law 2 that makes the steady-state switching frequency finite.

Switching Control Law 2

When the current mode is Mode 1, if ${\alpha }_1\left(x\right)<{\beta }_1$ , then stay in Mode 1, otherwise change to Mode 2. When the current mode is Mode 2, if ${\alpha }_2\left(x\right)<{\beta }_2$ , then stay in Mode 2, otherwise change to Mode 1.

With ${\beta }_1>0$ (under Mode 1) and ${\beta }_2>0$ (under Mode 2), the state-trajectory will move around the operating point where the states $i_{L1}$ , $i_{L2}$ , $v_{C1}$ , and $v_{C2}$ , are bounded by sizeable ripples. As a result, the switching is delayed, and since the switching time is inversely proportional to the switching frequency, the switching frequency is therefore reduced.

Figure 3. Approximate state-trajectory (top) and it’s respected switching signal (bottom) at the steady-state.

Define $f=1/T$ as the steady-state switching frequency and $\lambda =\frac{v_{ref}}{v_{ref}+v_g}$ . The derivative of ${\alpha }_1\left(x\right)$ and ${\alpha }_2\left(x\right)$ is given by

$\begin{array}{c}{\dot{\alpha }}_1\left(x\right)=\frac{2}{C_2{R}^2}{\left(v_{C2}-v_{C2}^{*}\right)}^2-\frac{2}{C_{2}R}\left(v_{C2}-v_{C2}^{*}\right)\left(i_{L2}-i_{L2}^{*}\right)+\frac{i_{L2}^{*}}{C_1}{i}_{L2}\\ +\frac{v_g}{L_2}{v}_{C1}-\frac{v_g}{L_2}{v}_{C2}+v_g^2\left(\frac{1}{L_1}+\frac{1}{L_2}\right),\end{array}$

$\begin{array}{c}{\dot{\alpha }}_2\left(x\right)=\frac{2}{C_2{R}^2}{\left(v_{C2}-v_{C2}^{*}\right)}^2-\frac{2}{C_{2}R}\left(v_{C2}-v_{C2}^{*}\right)\left(i_{L2}-i_{L2}^{*}\right)\\ +\frac{i_{L1}^{*}}{C_1}{i}_{L1}+\frac{v_{ref}}{L_1}{v}_{C1}+\frac{v_{ref}}{L_2}{v}_{C2}\end{array}$

Substituting $x=x^{*}$ , then the gradient at the operating point is given by

${\dot{\alpha }}_1\left(x^{*}\right)=\frac{v_g^2}{L_1}+\frac{v_g^2}{L_2}+\frac{v_{ref}^2}{C_1{R}^2}$ ,

${\dot{\alpha }}_2\left(x^{*}\right)=\frac{v_{ref}^2}{v_g^2}\left(\frac{v_g^2}{L_1}+\frac{v_g^2}{L_2}+\frac{v_{ref}^2}{C_1{R}^2}\right)$ .

Observing Figure 3, it is found that

${\beta }_1=\frac{{\dot{\alpha }}_1\left(x^{*}\right)\lambda }{2f}=\frac{v_{ref}\left(L_1{L}_2{v}_{ref}^2+C_1{L}_1{R}^2{v}_g^2+C_1{L}_2{R}^2{v}_g^2\right)}{2f{C}_1{L}_1{L}_2{R}^2\left(v_{ref}+v_g\right)}$ ,(8)

${\beta }_2=\frac{{\dot{\alpha }}_2\left(x^{*}\right)\left(1-\lambda \right)}{2f}=\frac{v_{ref}^2\left(L_1{L}_2{v}_{ref}^2+C_1{L}_1{R}^2{v}_g^2+C_1{L}_2{R}^2{v}_g^2\right)}{2f{C}_1{L}_1{L}_2{R}^2{v}_g\left(v_{ref}+v_g\right)}$ .(9)

From (8) and (9) above, by defining the desired steady-state switching frequency $f$ , Switching Control Law 2 will enforce the voltage regulation and makes the DC-DC Zeta converter operate at the prescribed switching frequency.

3.2. Non-Ideal DC-DC Zeta Converter Control

In practice, there exists an internal resistance or a voltage drop at the electronics components. Under this circumstance, the average input power $P_{\text{in}}$ for the converter is given by $P_{\text{in}}=P_{\text{out}}+P_{\text{loss}}$ , where $P_{\text{out}}$ and $P_{\text{loss}}$ is the output power, and the loss power, respectively. Since $P_{\text{out}}<P_{\text{in}}$ , then

$i_o{v}_o<i_{L1}^{*}{v}_g$

$\frac{v_o}{R}{v}_o<\frac{v_{ref}^2}{R{v}_g}{v}_g$

$v_o<v_{ref}$ .

As shown above, the output voltage is less than the prescribed value. To compensate for the output voltage discrepancy, extra input power needs to be supplied. Consider the output voltage equal to the prescribed value. With the assumption of constant input current, the input voltage, therefore, needs to be increased, consequently the power loss is expressed by

$\begin{array}{c}{P}_{\text{loss}}=P_{\text{in}}-P_{\text{out}}\\ =\frac{v_{ref}^2}{R{v}_g}\left(v_g+\Delta v_g\right)-\frac{v_{ref}^2}{R}\\ =\frac{\Delta v_g}{v_g}\frac{v_{ref}^2}{R}\end{array}$ . (10)

Dividing (8) and (9), the ratio of ${\beta }_1$ over ${\beta }_2$ is given by

$\frac{{\beta }_1}{{\beta }_2}=\frac{v_g}{v_{ref}}$ .(11)

For the Zeta topology, since the input voltage is only connected during Mode 1, the increase in the input voltage is therefore translated to the increment of ${\beta }_1$ . Let define

$\frac{{{\beta }^{\prime }}_1}{{\beta }_2}=\frac{v_g+\Delta v_g}{v_{ref}}$ .(12)

Eliminating ${\beta }_2$ in (11) and (12), and solving for ${{\beta }^{\prime }}_1$ yield

${{\beta }^{\prime }}_1={\beta }_1\left(1+\frac{\Delta v_g}{v_g}\right)$ .

Furthermore, since $\frac{\Delta v_g}{v_g}=\frac{R}{v_{ref}^2}{P}_{\text{loss}}$ , then

${{\beta }^{\prime }}_1={\beta }_1\left(1+\frac{R}{v_{ref}^2}{P}_{\text{loss}}\right)$ . (13)

Consider an on resistance $r_{ds\left(on\right)}$ at the power switch $S$ , a forward voltage drop $V_{fw}$ at the diode $d$ , and an equivalent series resistance (ESR) $r_{L1}$ and $r_{L2}$ at the inductor $L_1$ and $L_2$ , respectively. Then, the average power loss under this condition is given by

$\begin{array}{c}{P}_{\text{loss}}=\frac{v_g+v_{ref}}{v_g}\left(i_{L1}^{*}+i_{L2}^{*}\right)V_{fw}+{\left(\frac{v_g+v_{ref}}{v_g}\right)}^2{\left(i_{L1}^{*}+i_{L2}^{*}\right)}^2{r}_{ds\left(on\right)}\\ +{\left(\frac{v_g+v_{ref}}{v_g}\right)}^2{i}_{L1}^{*}{}^2{r}_{L1}+{\left(\frac{v_g+v_{ref}}{v_g}\right)}^2{i}_{L2}^{*}{}^2{r}_{L2}\\ =\frac{v_g+v_{ref}}{v_g}\left(\frac{v_{ref}^2}{R{v}_g}+\frac{v_{ref}}{R}\right)V_{fw}+{\left(\frac{v_g+v_{ref}}{v_g}\right)}^2{\left(\frac{v_{ref}^2}{R{v}_g}+\frac{v_{ref}}{R}\right)}^2{r}_{ds\left(on\right)}\\ +{\left(\frac{v_g+v_{ref}}{v_g}\right)}^2{\left(\frac{v_{ref}^2}{R{v}_g}\right)}^2{r}_{L1}+{\left(\frac{v_g+v_{ref}}{v_g}\right)}^2{\left(\frac{v_{ref}}{R}\right)}^2{r}_{L2}\\ =\frac{v_{ref}{\left(v_g+v_{ref}\right)}^2}{R{v}_g^2}\left(V_{fw}+\frac{v_{ref}}{R{v}_g^2}\left({\left(v_g+v_{ref}\right)}^2{r}_{ds\left(on\right)}+v_g^2{r}_{L2}+v_{ref}^2{r}_{L1}\right)\right)\end{array}$ .(14)

Consequently, substituting (14) into (13), therefore

${{\beta }^{\prime }}_1={\beta }_1\left(1+\frac{{\left(v_g+v_{ref}\right)}^2}{v_g^2{v}_{ref}}\left(V_{fw}+\frac{v_{ref}}{R{v}_g^2}\left({\left(v_g+v_{ref}\right)}^2{r}_{ds\left(on\right)}+v_g^2{r}_{L2}+v_{ref}^2{r}_{L1}\right)\right)\right)$ . (15)

Therefore, to adapt the Switching Control Law 2 in practice and to overcome the issue of the steady-state output voltage error, ${\beta }_1$ needs to be replaced with ${{\beta }^{\prime }}_1$ . To evaluate the effectiveness of the proposed switching control law, a design example and the simulation results are presented in Section 4.

4. Design Example and Simulation Results

With the smartphone charging application in mind, we choose the converter parameters, as shown in Table 1. The typical rated voltage to charge a smartphone battery is 5 V, therefore it is the selected reference output voltage $v_{ref}$ for the converter. Meanwhile, 2 A is the typical rated current hence the load resistance $R$ is set to 2.5 Ω. As for the non-ideal parameters $r_{ds\left(on\right)}$ , $r_{L1}$ , $r_{L2}$ , and $V_{fw}$ , they are realistically defined based on the datasheet in [30]-[32].

Table 1. DC-DC Zeta converter parameters.

Parameter	Value
$v_g$	18 V
$v_o\left(v_{ref}\right)$	5 V
$R$	2.5 Ω
$L_1$	100 μH
$L_2$	100 μH
$C_1$	100 μF
$C_2$	220 μF
$f$	100 kHz
$r_{ds\left(on\right)}$	0.16 Ω
$r_{L1}$	33 mΩ
$r_{L2}$	33 mΩ
$V_{fw}$	0.52 V

Table 2. Input voltage perturbation setup.

Input voltage $v_g$	Ave. input power $P_g$	Ave. input current $I_g$	Load resistance $R$
18 V	10 W	0.56 A	2.5 Ω
9 V	5 W	0.56 A	5 Ω
4.5 V	2.5 W	0.56 A	10 Ω

On the other hand, the input voltage $v_g$ is assumed to be generated from photovoltaic (PV) panel with 10 W power rating. By looking at the 10 W PV datasheet [33], the typical voltage and current during maximum power generation are 18 V, and 0.56 A, respectively. Based on the characteristic of the PV [34], if less power is generated due to the low temperature and assumed that the irradiance remains constant at 1000 W/m², the current remains constant, but the voltage will be decreased. With this fact, we reflect the decrease of the input voltage $v_g$ to the load resistance $R$ with the assumption of zero power loss. For example, when input voltage $v_g$ reduces to 9 V, since the average input current $I_g$ is constant at 0.56 A, this gives an indication that the average input power $P_g$ is 5 W ($P_g=I_g{v}_g$ ). Assuming all the input power $P_g$ is transferred to the output/load, this is equivalent to the load resistance $R$ of 5 Ω. For other examples, refer to Table 2.

To have a full on-line computation capability, in addition to the four state variables $i_{L1}$ , $i_{L2}$ , $v_{C1}$ , and $v_{C2}$ , two other variables are measured namely the input voltage $v_g$ and the load current $i_o$ , In practice, it is highly favorable to have less computation burden. As such, the parameters that are fixed are computed off-line to reduce unnecessary on-line computation. Moreover, the floating number is avoided to achieve fast computation especially if one wants to implement hybrid control digitally. Considering the criteria, with (4), Table 1 and $R=v_{C2}/i_o$ , the following expressions are gathered.

${\alpha }_1\left(x\right)=v_g\left(i_{L1}+i_{L2}\right)-i_o{v}_{C2}-\frac{5i_o}{v_{C2}}\left(v_{C1}-2v_{C2}+v_g+5\right),$ (16)

${\alpha }_2\left(x\right)=-5\left(i_{L1}+i_{L2}\right)-i_o{v}_{C2}+\frac{5i_o}{v_{C2}}\left(2v_{C2}+\frac{5v_{C1}}{v_g}\right),$ (17)

$\begin{array}{c}{{\beta }^{\prime }}_1=\frac{1}{4\left(v_g+5\right)}\left(25{\left(\frac{i_o}{v_{C2}}\right)}^2+2v_g^2\right)\\ \times \left(1+\frac{33{\left(v_g+5\right)}^2}{1000v_g^2}\left(3+\frac{i_o}{v_{C2}{v}_g^2}\left(160{\left(v_g+5\right)}^2+v_g^2+25\right)\right)\right),\end{array}$ (18)

${\beta }_2=\frac{5}{4v_g\left(v_g+5\right)}\left(25{\left(\frac{i_o}{v_{C2}}\right)}^2+2v_g^2\right).$ (20)

Following Switching Control Law 2, the hybrid control algorithm for the stabilization of the DC-DC Zeta converter is executed as follows:

Hybrid Control Algorithm

Define initial conditions: $Set=1$ , $Reset=0$ , $S=0$ , $currentS=0$ . a) Measure $i_{L1}$ , $i_{L2}$ , $v_{C1}$ , $v_{C2}$ , $v_g$ and $i_o$ . b) Compute ${\alpha }_1$ , ${\alpha }_2$ , ${{\beta }^{\prime }}_1$ and ${\beta }_2$ in (16), (17), (18) and (19), respectively. c) If ${\alpha }_1\left(x\right)<{{\beta }^{\prime }}_1$ , assign $Reset=0$ , else $Reset=1$ . If ${\alpha }_2\left(x\right)<{\beta }_2$ , assign $Set=0$ , else $Set=1$ . If $Set=1$ and $Reset=0$ , assign $S=1$ , else if $Set=0$ and $Reset=1$ , assign $S=0$ , else assign $S=currentS$ , $currentS=S$ . Repeat (a) to (c).

Figure 4. Simulation results under perturbations. Comparison of the responses from the hybrid control with the inclusion of ${\beta }_1$ or ${{\beta }^{\prime }}_1$ .

Figure 5. Close view (zoom in) of the steady-state switching signal at three-different time intervals.

Tested in PSIM^®, the simulation results under the perturbations are shown in Figure 4. Initially, the input voltage is set to 18 V, and the corresponding load current is 2 A ($R=2.5$ Ω). As can be observed, with the controller either utilizes ${\beta }_1$ or ${{\beta }^{\prime }}_1$ , the output voltage settles at approximately 5 ms with no overshoot for both cases, with the different though is the former produces approximately −2.4% output voltage steady-state error ($v_o=4.88$ V). At $t=20$ ms, the input voltage abruptly drops to 9 V (−50%) which in turn reduces the output current to 1 A ($R=5$ Ω). Although with the large input voltage perturbation, the effect in term of output voltage overshoot is quite minimal for both controllers (with ${\beta }_1$ or ${{\beta }^{\prime }}_1$ ) although some oscillations are found before they settle down at approximately $t$ = 15 ms. However, the output voltage steady-state error increases to -4.6% ($v_o=4.77$ V) for the controller with ${\beta }_1$ . Moreover, at $t=20$ ms, the input voltage drops further to 4.5 V and the output current becomes 0.5 A ($R=10$ Ω). Interesting to note here is at this condition, the converter’s operation changed from step-down (at $t=0$ ms and $t=10$ ms) to step-up thus highlight the usefulness of the Zeta topology which can handle two operation modes. The output voltage steady-state error (with ${\beta }_1$ ) is at its worst at −7.4% ($v_o=4.63$ V) even though with less overshoot and oscillation as compared to previous case. On the contrary, in all the cases, the controller with ${{\beta }^{\prime }}_1$ provides a very good compensation in such that no output voltage steady-state error is observed.

So far, we have proved the effectiveness of the proposed hybrid control in regulating the output voltage even with the existence of large perturbation. Next, we want to confirm the correctness of the mathematical models in reducing the steady-state switching frequency. To begin with, let’s have a look at the close view (zoom in) of the switch $S$ waveform in Figure 5. As seen in the figure, with the input power of 10 W, 5 W, and 2.5 W, the respected steady-state switching frequency for the controller with ${\beta }_1$ is 100 kHz, 98 kHz, and 94 kHz, whereas 87.7 kHz, 83.3 kHz, and 70.4 kHz, respectively, are recorded for the one with ${{\beta }^{\prime }}_1$ . As a reference, the pre-defined switching frequency is 100 kHz (refer to Table 1). Therefore, there are some discrepancies especially for the later controller. This is due to relatively lower efficiency at lower input power which in turn gives higher power loss thus from (13), this increases the magnitude of ${{\beta }^{\prime }}_1$ . Furthermore, since ${{\beta }^{\prime }}_1$ is inversely proportional to the switching frequency, lower switching frequency is expected. Nonetheless, the mathematical models guarantee the upper bound of the switching frequency thus preventing the arbitrary fast switching frequency from happening.

5. Conclusion

In this paper, we have presented output voltage stabilization with consideration of non-ideal DC-DC Zeta converter components. From the simulation results, it is shown that by taking into consideration the non-ideal properties of the Zeta converter in the switching control law formulation, the steady-state output voltage error is successfully eliminated. Furthermore, the upper bound of desired steady-state switching frequency is achieved. The above results make this research close to a practical environment. Nevertheless, the hardware experimental validation, as well as other input sources such as wind and thermal energy, will be investigated in future research.

Acknowledgements

The authors would like to thank Fakulti Teknologi dan Kejuruteraan Elektronik dan Komputer and Universiti Teknikal Malaysia Melaka for supporting this research.

Conflicts of Interest

The authors declare no conflicts of interest regarding the publication of this paper.

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