A 9 - 10.6 GHz Microstrip Antenna—UWB Low Noise Amplifier with Differential Noise Canceling Technique for IoT Applications

DOI: 10.4236/ijcns.2019.1211013   PDF   HTML   XML   260 Downloads   434 Views  


An ultra-wide band (UWB) receiver front-end that operates at the UWB frequency range, starting from 9 GHz - 10.6 GHz is proposed in this paper. The proposed system consists of an off-chip microstrip antenna and CMOS differential low noise amplifier with a differential noise canceling (DNC) technique. The proposed antenna is trapezoidal dipole shaped with balun and printed on a low-cost FR4 substrate with dimensions 10 × 10 × 0.8 mm3. The balun circuit integrated with the ground antenna to improve the antenna impedance matching. Noise canceling is obtained by using a differential block with each stage having 2 amplifiers that generate differential signals, subtracted to improve total noise performance. The proposed DNC block improves NF by 50% while increasing total power consumption with only 0.1 Mw. The differential CMOS cascode LNA with DNC block is implemented using UMC 0.13 μm CMOS process, exhibits a flat gain of 19 dB, maximum noise figure of 2.75 dB, 1 dB compression point 16 dBm and 3rd order intercept point (IIP3) 10 dBm. The proposed system has total DC power consumption of 2.8 mW at 1.2 V power supply.

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Elsheakh, D. , Shawkey, H. and Saleh, S. (2019) A 9 - 10.6 GHz Microstrip Antenna—UWB Low Noise Amplifier with Differential Noise Canceling Technique for IoT Applications. International Journal of Communications, Network and System Sciences, 12, 189-197. doi: 10.4236/ijcns.2019.1211013.

1. Introduction

Recently, rapid progress is made in ultra-wideband (UWB) applications with high data rate communications in short distances with low fabrication cost as Iinternet of things (IoT) [1]. IoT connects billions of objects to form a huge network for communications and perform smart actions. There aren’t any standard definitions for IoT [2]. Various definitions are listed as IoT allows things and people to be connected anywhere. IoT is widely used for sensing applications, security purposes and high data rate 5G communications since it enables robust wireless systems in dense multipath scenarios [3]. In this paper, a complete UWB receiver for IoT applications is proposed. Wide band has ability for deep wall penetration as well as resolution of sub-nanosecond delays in centimeter-level distance resolutions. Added to this is an improvement on the timing resolution compared to conventional narrowband signals. In addition to broadband gain and input matching requirements, the broadband standard also poses a tight specification on the band switching time, thus precluding the direct synthesis of frequencies by phase locking. An approach suggested for this task incorporates a single phase-locked loop (PLL) and wideband mixer to generate different frequencies that are present at all times and could simply be selected as the local oscillator (LO) signal [4]. Compact low-power consumption antennas that can be easily embedded within the system are considered essential for portable IoT devices [5].

UWB antennas used planar microwave circuitry have generated attractive radiating structures with high gain, low weight, reliability, ease of manufacturing and integration such as the Vivaldi antennas and the tapered slot antenna. UWB has many definitions as IEEE (the operating bandwidth greater than 20% antennas [1] ) or as FCC (released in 2002 that the UWB protocol that covers the frequency ranges from 3.1 - 10.6 GHz). UWB planar microwave circuitry has generated attractive radiating structures with high gain, low weight, reliability, ease of manufacturing and integration such as the Vivaldi antennas [6] [7], and the tapered slot antenna [8] [9] and planar log-periodic dipole (LPDA) [10] [11].

In this paper, a complete wideband receiverfront end that operates in the frequency range 9 - 10.6 GHz is proposed. Figure 1 shows the block diagram for the proposed receiver, which consists of the off-chip microstrip antenna, a balun and on-chip CMOS low noise amplifier (LNA). The LNA is implemented using UMC 130 nm CMOS technology with a simple noise canceling technique.

The paper is organized as follows. Section 2 describes the design and analysis of the proposed broadband antenna in terms of reflection coefficient, antenna impedance, efficiency and antenna gain. Section 3 introduced the UWB low noise amplifier with differential noise canceling (DNC) technique. While Section 4 shows the system simulation. Finally, Section 5 concludes the proposed work.

2. Wideband Antenna Design

In this section a new proposed wide bandwidth antenna is presented which consists of a combined structure of different lengths of printed trapezoidal dipole fed by CPW and balun circuit to improve the impedance matching. The proposed antenna as shown in Figure 2 has been designed with 3D electromagnetic

Figure 1. Block diagram of the proposed UWB receiver.

(a) (b)

Figure 2. (a) Layout of the proposed trapezoidal dipole antenna and (b) photo of the fabricated antenna.

simulation HFSS ver. 14. The proposed antenna dimensions are 10 × 10 × 0.8 mm3 when printed on a FR4 dielectric substrate. The proposed CPW trapezoidal dipole antenna introduces UWB with the multiple resonant properties. Figure 2 shows the geometry and dimensions of the proposed antenna and the final dimensions are shown in Table 1. To improve the antenna bandwidth modified rectangular dipole is used by using two different bases width and etching balun to improve the impedance matching with suitable dimensions is used as shown in Figure 3. These wideband are used for different wireless communications applications and for UWB applications. The antenna is fed by 50-Ω transmission line (TL), which can be easily integrated with other microwave circuits printed on the same substrate.

The proposed antenna is fabricated by using photolithographic technique and it is measured by using a Rohde & Schwarz ZVA67 vector network analyzer (50 MHz to 67 GHz). Then the comparison results between simulated and measured of the proposed antenna for both reflection coefficient and antenna impedance real and imaginary are shown in Figure 3(a). This figure shows that good agreement between measured and simulated results and 50 Ω input impedance with zero imaginary part of the proposed antenna at 7.8 GHz with reflection coefficient |S11| = −37 dB with wideband extend from 7 GHz to 12 GHz at −6 dB reflection coefficient which is wide enough to cover the FCC approved UWB in addition to wireless communications. Figure 3(b) shows that the antenna gain and radiation efficiency for the proposed antenna. It is very clear that the antenna has suitable gain in the frequency range of operations about 3.5 dBi in average while the antenna radiation efficiency has about 80%.

Table 1. Dimensions of the proposed antenna (dimensions in mm).

Figure 3. (a) Simulated and measured results of the proposed antenna |S11|with the impedance (real and imaginary) and (b) Simulated gain and radiation efficiency of proposed dipole.

3. UWB Low Noise Amplifier with Differential Noise Canceling (DNC) Technique

Figure 4(a) shows A simplified resistive shunt feedback LNA composed of a transistor M1, a resistor RF, and a feedforward voltage amplifier with a gain of Ax with a previously reported noise canceling technique [12] [13] [14] [15]. By generating two signals - with two different gain and phase - using 2 amplifiers Ax and Ay, these signals are subtracted such that the noise is canceled. The propose DNC technique depends on using the concept shown in Figure 4(a) in differential architecture. Since the cancellation is irrelevant to the input impedance, this technique allows for simultaneously noise cancellation and impedance matching. Figure 4(b) shows our proposed technique, for a 2-stage differential amplifier with two branches each has a gain A1 A2. Each branch uses only one noise canceling amplifier Anc, the output of the noise-canceling amplifier in each branch is added to the input of amplifier A2 of other branch, which can be considered as subtraction technique.

Figure 5(a) shows circuit diagram for the proposed LNA. It consists of two-stages, a cascade common source common gate (CS-CG) amplifier—M1 to

Figure 4. (a) Previously reported gain-enhanced noise-canceling technique [16] and (b) Proposed differential noise canceling technique.

Figure 5. UWB LNA circuit diagram with proposed differential noise canceling block.

M4-with inductive load L1, L2 and a shunt feedback common source (SF-CS) amplifier—M5 and M6 to obtain the wideband frequency of operation with an inductive output load L5, L6 [12]. Inductive inter stage network L3, C1 and L4, C2 is set between the two stages to improve gain bandwidth performance [16].

M7 and M8 represent the noise canceling amplifiers with their biasing resistances Rb. Simulation for the LNA connected to a 50 Ω load terminal with and without noise canceling blocks is shown in Figure 6. Figure 6(a) shows a flat gain with maximum 19 dB and 0.5 dB gain attenuation between maximum and minimum gain in the frequency band 9 - 10.6 GHz, while Gain NC represents the gain with the noise canceling blocks that improves the flatness of the gain and widens its bandwidth. Figure 6(b) shows that the LNA has 5.5 dBNF at 10 GHz, adding the noise canceling blocks reduces NF to 2.75 dBw hich is considered a good improvement compared with other low noise topologies that uses inductors with large area compared with the blocks added. The proposed LNA has a DC power dissipation 2.8/2.9 mW without/with noise canceling block. This shows that the proposed noise canceling technique improves the NF by 50% while power dissipation is increase by 0.1 mW. Besides, the DNC block doesn’t contain inductors which leads to negligible area increment and the dimensions of the proposed LNA is listed in Table 2.

4. System Simulation

The complete receiver front-end—including antenna S-parameters—is simulated to check the complete system performance. Figure7(a) shows flat gain in the band of operation 9 - 10.6 GHz with slight variation compared with LNA gain (Gain NC) shown in Figure6(a) which shows the perfect matching between the balun and LNA. Figure7(b) shows that maximum Noise FigureNF is 3 dB in the band of operation. The linearity is shown in Figure7(c) with 1 dB compression point −16 dBm, 3rd order intercept point (IIP3) −10 dBm. Figure7(d) shows a good matching between antenna and LNA with input reflection coefficient <

Figure 6. LNA Simulation with/without Noise Canceling blocks (a) gain and (b) Noise Figure.

Figure 7. Complete receiver front-end simulation Performance (a) gain (b) Noise Figure, (c) linearity and (d) input matching.

Table 2. Dimensions of the proposed antenna.

−10 dB. Table 3 shows a comparison between the proposed system and other UWB receivers’ front-end.

It is clear from the table that the proposed system has very low power dissipation, high gain and low NF compared with other topologies. Although, the IIP3 is low but it could accept for UWB receivers. Moreover, the proposed LNA has limited number of on-chip inductors, which lead to small implementation area. All these specifications make it suitable for low power applications as IoT, WSN and general sensing applications.

Table 3. Performance Comparison with previously reported UWB LNA.

5. Conclusion

This paper has proposed a low power, low NF UWB receiver front-end. The proposed system consists of an ultra-wideband CPW-fed trapezoidal dipole shaped antenna and a CMOS LNA. The dipole antenna creates an ultra-wideband extended from 7 GHz to 12 GHz. The LNA consists of two stages with inductive interstage network to increase BW and a noise canceling stage to improve NF with simple MOSFET. The proposed system has a 19 dB flat gain in the frequency band 9 - 10.6 GHz with low NF 2.75 dB, low DC power consumption 2.9 mW which make it suitable for IoT technology and sensing applications.

Conflicts of Interest

The authors declare no conflicts of interest regarding the publication of this paper.


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