[1]
|
P. Leroux and M. Steyaert, “High-Performance 5.2 GHz LNA with on-Chip Inductor to Provide ESD Protection,” Electronics Letters, Vol. 37, No. 7, 2001, pp. 467-469. doi:10.1049/el:20010271
|
[2]
|
A. Chatterjee and T. Polgreen, “A Low-Voltage Triggering SCR for on-Chip ESD Protection at Output and Input Pads,” IEEE Electron Devices Letters, Vol. 12, No. 1, 1991, pp. 21-22. doi:10.1109/55.75685
|
[3]
|
E. R. Worley, R. Gupta, B. Jones, R. Kjar, C. Nguyen and M. Tennyson, “Sub-micron Chip ESD Protection Schemes Which Avoid Avalanching Junctions,” Electrical Overstress/Electrostatic Discharge Symposium Proceedings, Phoenix, 12 September 1995, pp. 13-20.
|
[4]
|
J. Y. Choi, “A Comparison Study of Input ESD Protection Schemes Utilizing NMOS, Thyristor, and Diode Devices,” Communications and Network, Vol. 2, No. 1, 2010, pp. 11-25. doi:10.4236/cn.2010.21002
|
[5]
|
H. Feng, G. Chen, R. Zhan, Q. Wu, X. Guan, H. Xie and A. Z. H. Wang, “A Mixed-Mode ESD Protection Circuit Simulation-Design Methodology,” IEEE Journal of Soilid-State Circuits, Vol. 38, No. 6, June 2003, pp. 995-1006. doi:10.1109/JSSC.2003.811978
|
[6]
|
B. Fankhauser and B. Deutschmann, “Using Device Simulations to Optimize ESD Protection Circuits,” International Symposium on Electromagnetic Compatibility, Santa Clara, 9-13 August 2004, pp. 963-968.
|
[7]
|
Silvaco International, “ATLAS II Framework,” Version 5.10.2.R, Silvaco International, Austin, 2005.
|
[8]
|
J.-Y. Choi, W. S. Yang, D. Kim and Y. Kim, “Thyristor Input-Protection Device Suitable for CMOS RF ICs,” Analog Integrated Circuits and Signal Processing, Vol. 43, No. 1, April 2005, pp. 5-14. doi:10.1007/s10470-005-6566-y
|
[9]
|
H. Feng, K. Gong and A. Wang, “A Comparison Study of ESD Protection for RFIC’s: Performance vs. Parasitic,” 2000 IEEE Radio Frequency Integrated Circuits Symposium, Boston, 11-13 June 2000, pp. 143-146.
|
[10]
|
M.-D. Ker, C.-Y. Wu and H.-H. Chang, “Complementary-LVTSCR ESD Protection Circuit for Submicron CMOS VLSI/ULSI,” IEEE Transactions on Electron Devices, Vol. 43, No. 4, 1996, pp. 588-598. doi:10.1109/TED.1996.1210725
|
[11]
|
Z. H. Liu, E. Rosenbaum, P. K. Ko, C. Hu, Y. C. Cheng, C. G. Sodini, B. J. Gross and T. P. Ma, “A Comparative Study of the Effect of Dynamic Stressing on High-Field Endurance and Stability of Reoxidized-Nitrided, Fluorinated and Conventional Oxides,” International Electron Devices Meeting, Washington, 8-11 February1991, pp. 723-726.
|
[12]
|
G. Chen, H. Fang and A. Wang, “A Systematic Study of ESD Protection Structures for RF ICs,” 2003 IEEE Radio Frequency Integrated Circuits Symposium, Philadelphia, 8-10 June 2003, Vol. 46, pp. 347-350.
|