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FPGA modeling of a novel fully-synthesizable and secure TRNG based on key-dependent s-box
Digital Signal Processing,
2023
DOI:10.1016/j.dsp.2023.103969
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[2]
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Birds of the Same Feather Flock Together: A Dual-Mode Circuit Candidate for Strong PUF-TRNG Functionalities
IEEE Transactions on Computers,
2023
DOI:10.1109/TC.2022.3218986
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[3]
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A gigabit TRNG with novel lightweight post-processing method for cryptographic applications
The European Physical Journal Plus,
2022
DOI:10.1140/epjp/s13360-022-02679-7
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[4]
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Design, FPGA implementation and statistical analysis of a high-speed and low-area TRNG based on an AES s-box post-processing technique
ISA Transactions,
2021
DOI:10.1016/j.isatra.2021.01.054
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[5]
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Lightweight Integrated Design of PUF and TRNG Security Primitives Based on eFlash Memory in 55-nm CMOS
IEEE Transactions on Electron Devices,
2020
DOI:10.1109/TED.2020.2976632
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[6]
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A TRNG using chaotic entropy pool as a post-processing technique: analysis, design and FPGA implementation
Analog Integrated Circuits and Signal Processing,
2020
DOI:10.1007/s10470-020-01605-0
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A true random number generator based on a Chua and RO-PUF: design, implementation and statistical analysis
Analog Integrated Circuits and Signal Processing,
2019
DOI:10.1007/s10470-019-01474-2
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A novel True Random Bit Generator design for image encryption
Physica A: Statistical Mechanics and its Applications,
2019
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True Random Number Generation from Bioelectrical and Physical Signals
Computational and Mathematical Methods in Medicine,
2018
DOI:10.1155/2018/3579275
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