Brenner, U. (2013) Bonnplace Legalization: Minimizing Movement by Iterative Augmentation. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 32, 1215-1227.
https://doi.org/10.1109/TCAD.2013.2253834

has been cited by the following article:

• TITLE: A Connectivity-Based Legalization Scheme for Standard Cell Placement

  AUTHORS: Antonios N. Dadaliaris, Panagiotis Oikonomou, Maria G. Koziri, Evangelia Nerantzaki, Thanasis Loukopoulos, Georgios I. Stamoulis

  KEYWORDS: Legalization, Standard Cell Placement, Heuristics, Interconnect Wirelength

  JOURNAL NAME: Circuits and Systems, Vol.8 No.8, August 28, 2017

  ABSTRACT: Standard cell placement algorithms have been at the forefront of academic research concerning the physical design stages of VLSI design flows. The penultimate step of a standard cell placement procedure is legalization. In this step the manufacturability of the design is directly settled, and the quality of the solution, in terms of wirelength, congestion, timing and power consumption is indirectly defined. Since the heavy lifting regarding processing is performed by global placers, fast legalization solutions are protruded in state-of-the-art design flows. In this paper we propose and evaluate a legalization scheme that surpasses in execution speed two of the most widely used legalizers, without not only corrupting the quality of the final solution in terms of interconnection wirelength but improving it in the process.