Author(s)

Ali Mohsen^1,2, Adnan Harb^1*, Nathalie Deltimple², Abraham Serhane³

¹Department of Electrical and Electronics Engineering, Lebanese International University, Beirut, Lebanon.
²IMS Laboratory, University of Bordeaux, Talence Cedex, France.
³Department of Industrial Engineering, Lebanese International University, Beirut, Lebanon.

This is Part II of a two-part paper that explores the 28-nm UTBB FD-SOI CMOS and the 22-nm Tri-Gate FinFET technology as the better alternatives to bulk transistors especially when the transistor’s architecture is going fully depleted and its size is becoming much smaller, 28-nm and above. Reliability tests of those alternatives are first discussed. Then, a comparison is made between the two alternative transistors comparing their physical properties, electrical properties, and their preferences in different applications.

UTBB FD-SOI: Ultra-Thin Body and Box Fully Depleted Silicon on Insulator, Tri-Gate FinFET, DIBL: Drain Induced Barrier Lowering

Mohsen, A. , Harb, A. , Deltimple, N. and Serhane, A. (2017) 28-nm UTBB FD-SOI vs. 22-nm Tri-Gate FinFET Review: A Designer Guide—Part II. Circuits and Systems, 8, 111-121. doi: 10.4236/cs.2017.85007.