Author(s)

Semih Aslan¹, G. Karuna Ranganathapura Chandrai¹, Vittal Siddaiah²

¹Ingram School of Engineering, Electrical Engineering, Texas State University, San Marcos, TX, USA.
²Intel Corporation, Austin, TX, USA.

The System-on-Chip’s increased complexity and shortened design cycle calls for innovation in design and validation. A high quality System-on-Chip creates distinction and position in the market, and validation is the key to a quality product. Validation consumes >60% of the product cycle. Therefore, validation should be carried out efficiently. Validation must be quantified to aid in determining its quality. Pre-silicon uses various coverage metrics for quantifying the validation. The available on-chip coverage logic limits the use of pre-silicon-like coverage metrics in post-silicon. Although on-chip coverage logic increases observability, it does not contribute to the functional logic; hence, they are controlled and limited. Discounting the need for the on-chip coverage logic, the question to be answered is whether or not these pre-silic-on coverage metrics applicable to post-silicon. We discuss the reasons for limited applicability of pre-silicon coverage metrics in post-silicon. This paper presents a unified SoC post-silicon coverage methodology centered on functional coverage metrics.

SoC, IoT, Coverage Metrics, Post-Silicon

Aslan, S. , Chandrai, G. and Siddaiah, V. (2016) Unified Coverage Methodology for SoC Post-Silicon Validation. Optics and Photonics Journal, 6, 261-268. doi: 10.4236/opj.2016.610026.