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[1]
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Accelerating Defect Simulation in Analog and Mixed-Signal Circuits by Parallel Defect Injection
2023 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems (VLSID),
2023
DOI:10.1109/VLSID57277.2023.00072
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[2]
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Accelerating Defect Simulation in Analog and Mixed-Signal Circuits by Parallel Defect Injection
2023 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems (VLSID),
2023
DOI:10.1109/VLSID57277.2023.00072
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[3]
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The Concept of Implementing an Adaptive System for Testing and Monitoring High-Speed Electronic Products
2022 Moscow Workshop on Electronic and Networking Technologies (MWENT),
2022
DOI:10.1109/MWENT55238.2022.9802365
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[4]
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Optimization of Synchronization in Monitoring and Control Systems
2021 International Siberian Conference on Control and Communications (SIBCON),
2021
DOI:10.1109/SIBCON50419.2021.9438873
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[5]
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A Methodology for Identification of Internal Nets for Improving Fault Coverage in Analog and Mixed Signal Circuits
Journal of Electronic Testing,
2020
DOI:10.1007/s10836-020-05915-z
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[6]
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Fault Classification and Coverage of Analog Circuits using DC Operating Point and Frequency Response Analysis
Proceedings of the 2019 Great Lakes Symposium on VLSI,
2019
DOI:10.1145/3299874.3317976
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[7]
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Fault Classification and Coverage of Analog Circuits using DC Operating Point and Frequency Response Analysis
Proceedings of the 2019 on Great Lakes Symposium on VLSI,
2019
DOI:10.1145/3299874.3317976
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[8]
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Fault Classification and Coverage of Analog Circuits using DC Operating Point and Frequency Response Analysis
Proceedings of the 2019 on Great Lakes Symposium on VLSI - GLSVLSI '19,
2019
DOI:10.1145/3299874.3317976
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[9]
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A Structured Approach for Rapid Identification of Fault-Sensitive Nets in Analog Circuits
2019 IEEE 28th Asian Test Symposium (ATS),
2019
DOI:10.1109/ATS47505.2019.00025
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[10]
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Test Systems Control for the Electronics Industry
2018 Dynamics of Systems, Mechanisms and Machines (Dynamics),
2018
DOI:10.1109/Dynamics.2018.8601420
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[11]
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Embedding Fault List Compression techniques in a design automation framework for analog and Mixed-Signal structural testing
2015 Conference on Design of Circuits and Integrated Systems (DCIS),
2015
DOI:10.1109/DCIS.2015.7388584
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[12]
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Fault list compression for efficient analogue and mixed-signal production test preparation
Design of Circuits and Integrated Systems,
2014
DOI:10.1109/DCIS.2014.7035567
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