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Circuits and Systems
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Circuits and Systems
ISSN Print:
2153-1285
ISSN Online:
2153-1293
www.scirp.org/journal/cs
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cs@scirp.org
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"
The Design of Ultra-Low Power Adder Cell in 90 and 180 nm CMOS Technology
"
written by
Masoud Sabaghi, Saeid Marjani, Abbas Majdabadi
,
published by
Circuits and Systems
,
Vol.7 No.2, 2016
has been cited by the following article(s):
Google Scholar
CrossRef
[1]
Comparative Analysis of Low Power Wallace Tree Encoders with Modified Full Adders
2021
[2]
Novel Quantum Structure of an III-V Tunneling Field-Effect Transistor with Source and Channel Heterojunction
2020
[3]
Fpga Synthesis And Validation Of Parallel Prefix Adders
2019
[4]
CMOS-DRPTL Adder Topologies
2018
[5]
A Novel Energy-Efficient Hybrid Full Adder Circuit
Advances in Data and Information Sciences
,
2018
[6]
A comparative performance analysis of CMOS XOR XNOR circuits
2017
[7]
Cost analysis study of variable parallel prefix adders using altera cyclone IV FPGA kit
2017
[8]
De-Noising of ECG Signals by Design of an Optimized Wavelet
2016
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