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Circuits and Systems
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Circuits and Systems
ISSN Print:
2153-1285
ISSN Online:
2153-1293
www.scirp.org/journal/cs
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cs@scirp.org
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"
Design of a New Serializer and Deserializer Architecture for On-Chip SerDes Transceivers
"
written by
Nivedita Jaiswal, Radheshyam Gamad
,
published by
Circuits and Systems
,
Vol.6 No.3, 2015
has been cited by the following article(s):
Google Scholar
CrossRef
[1]
Low-Power High-Speed On-Chip 5 to 1 Serializer in 180 nm Technology
2021
[2]
TSPC 디 플립플롭을 이용한 병렬 구조 직렬화기
2018
[3]
Three Levels Interconnect Signaling in On-Chip High Speed SerDes Transceiver for Multi-Module SoC Communication
Proceedings of the Sixth International Conference on Computer and Communication Technology 2015
,
2015
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