UDE-Based Robust Nonlinear Control of the Boost Converter with Constant Power Load

Abstract

The boost converter feeding a constant power load (CPL) is a non-minimum phase system that is prone to the destabilizing effects of the negative incremental resistance of the CPL and presents a major challenge in the design of stabilizing controllers. In this work, a robust nonlinear controller based on the uncertainty and disturbance estimator (UDE) scheme is successfully developed to tightly regulate the output voltage of the boost converter. A systematic procedure is developed to select the controller gains to achieve a satisfactory output response. Using simulation, the effectiveness of the proposed controller is validated and compared to a recent robust nonlinear controller.

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Oucheriah, S. and Azad, A. (2024) UDE-Based Robust Nonlinear Control of the Boost Converter with Constant Power Load. Circuits and Systems, 15, 57-71. doi: 10.4236/cs.2024.155005.

1. Introduction

Nowadays power electronic converters are extensively used in power distribution system and they are usually cascaded. Some of these converters operate as tightly regulated loads that absorb constant power and behave as constant power loads (CPLs). These loads exhibit negative incremental impedances that can lead to serious destabilizing effect of the input source which may be another DC-DC converter and present a major challenge in the design of stabilizing robust controllers for the supply converters.

Numerous design techniques have been published in the literature to regulate the output voltages of DC-DC converters to counter the instability effects of the CPL-induced negative impedance such as passive damping [1] and active damping [2]. A technique that uses nonlinear feedback to cancel the destabilizing effect of CPL, also known as loop cancellation technique, is presented in [3]. A control method based on a linearization via state feedback is used in [4] to design a controller to counter the CPL destabilizing effect.

Sliding mode control (SMC) has been extensively used for DC-DC converters and has been proven to yield a robust nonlinear control scheme against parameter uncertainties and external disturbances. A PWM-based SMC is developed in [5] to regulate the output voltage of the buck-boost converter feeding a CPL. The proposed control law suffers from chattering effects as shown in the simulation and experimental plots. An SMC is proposed in [6] that uses a sliding surface that is a linear combination of the errors of both inductor current and capacitor voltage with respect to their respective steady state values. The proposed controller leads to a small value of inrush current. However, the controller suffers from variable switching frequency effects. The implementation of both of SMC controllers requires four sensors to measure the input voltage, the inductor current, the capacitor voltage and the CPL current.

When the load power is unknown, we may have to resort to robust controllers that require some type of an estimation scheme. The authors in [7] proposed an adaptive passivity-based controller to regulate the output voltage of the DC-DC buck-boost converter feeding an unknown CPL. The resulting controller is very complicated and therefore is impractical in real applications. To remedy the complexity of the control law, a simpler modified controller is developed in [8] by using a change of coordinate and partial linearization that transforms the system into a cascade form. However, the approach relies on the time-scaled model that presents problems in practical applications. An adaptive passivity-based controller that does not use time scaling or any kind of linearization techniques is provided in [9] with a complete stability analysis of the nonlinear system. However, the controller still seems to be complicated and strongly dependent of the converter parameters to be of any practical interest.

An interesting and a simple robust controller was introduced in [10] to regulate the output voltage of the DC-DC boost converter feeding an unknown CPL, that was estimated using a nonlinear differential equation. However, the authors opted for the controller derived using the ideal averaged model of the boost converter and does not account for input voltage variations, parasitics and parameter uncertainties. In [11], an observer-based sliding mode control for the boost converter feeding a CPL was proposed to ensure the finite-time stability of the closed-loop system. In this study, only the input voltage is assumed unknown and is estimated using a finite-time observer to adjust a controller parameter. Only step reference changes and step input changes are tested in simulation and the robustness of the controller to parasitics, parameter uncertainties and output load power changes are neither tested or accounted for in the design of the controller. In [12], an adaptive nonlinear controller based on a nonlinear disturbance observer and passivity-based control is proposed to ensure the stability of a buck-boost converter in a DC microgrid in the presence of disturbances and uncertainties. However, the robustness of the controller developed was not tested against the parasitics and the uncertainties of the converter parameter values. In [13], the cumulative losses of the converter are modelled as a resistor in series with the inductor and its value with the value of the power load are estimated using the immersion and variance technique and both incorporated in the controller design. However, the input voltage and parameter uncertainties are not accounted for in the controller design.

The effectiveness and performance of the controller on the output response of the converter depends on an accurate modeling of the system. Ignoring parasitics, parameter uncertainties, input voltage and output load power disturbances in the design of the controller may result in a degradation of the output response. In this case, the output response may suffer from substantial steady-state errors with large output variations when the converters are subjected to large unknown time-varying external disturbances that may even lead to unstability.

To address the above limitations, a fixed-frequency pulse width modulation controller that takes into account the uncertainties of the component values, the unknown parasitics of the converters, the unknown input voltage and power load variations is designed to regulate the output of the boost converter. The proposed controller is based on the uncertainty and disturbance estimator (UDE) scheme that was originally developed in [14] as an improvement of the time delay control. The basic idea behind the UDE-based control method is the use of a filter of appropriate bandwidth to estimate a lumped signal composed of system uncertainties, unmodelled dynamics of the converter, and time-varying external disturbances then use the estimate in the controller to cancel their effects. Also included in this work is a detailed analysis of the closed-loop stability with a simple procedure that systematically determines the controller’s parameters to meet certain desired specifications of the output response. This is in contrast to many studies where the parameters are chosen in an ad-hoc manner and may require elaborate tuning steps. Using simulation, the effectiveness of the proposed controller is validated and compared against the nonlinear controller developed in [10].

2. Proposed UDE-Based Controller

2.1. Boost Converter Averaged Model with Parasitics

A basic boost converter with parasitic elements feeding a CPL is shown in Figure 1. Under continuous conduction mode (CCM), the averaged model of the boost converter including parasitic components is derived using Kirchhoff’s circuit laws in both modes, u = 1 (ON-state) and u = 0 (OFF-state) and then using the state-space averaging technique to obtain

x ˙ 1 =( R L L + R DS L u+( 1u ) R D L ) x 1 ( 1u ) x 2 L ( 1u ) V D L + E L x ˙ 2 =( 1u ) x 1 C P C x 2 +( 1u ) R C x ˙ 1 + R C P x 2 2 x ˙ 2 (1)

where x 1 represents the average inductor current, x 2 >0 is the average output voltage and P is the power extracted by the CPL. The unknown parameters E, L, C and P represent the input voltage, the inductance, the capacitance and the power respectively. However, their respective nominal values E o , L o , C o and P o are assumed known for the implementation of the controller. The control input u to the converter is the duty ratio function. The unknown parameters R L , R DS , R D , V D and R C represent the inductor equivalent series resistance, the MOSFET on-resistance, the diode forward resistance, the conducting voltage of the diode and the capacitor equivalent series resistance respectively. The switching losses could have been accounted for by including a switching loss resistance in the inductor branch as proposed in [15]. During the start-up phase and neglecting the parasitics, diode D 1 guarantees that the initial conditions are

x 2 ( 0 )=E, x 1 ( 0 )=0 (2)

by creating a unidirectional path from the source to the load and therefore, reducing the inrush current in the inductor [10].

Figure 1. A boost converter with basic parasitics feeding a CPL.

2.2. UDE-Based Contol Law

We can write (1) as

x ˙ 1 =u x 2 L o + f 1 ( t ) x ˙ 2 = f 2 ( t ) (3)

where

f 1 ( t )=( R L L + R DS L u+( 1u ) R D L ) x 1 x 2 L +u x 2 ( 1 L 1 L o )( 1u ) V D L + E L f 2 ( t )=( 1u ) x 1 C +u x 1 ( 1 C o 1 C ) P C x 2 +( 1u ) R C x ˙ 1 + R C P x 2 2 x ˙ 2 (4)

The state errors e 1 and e 2 are defined as

e 1 = x 1 i ref , e 2 = V ref x 2 (5)

where i ref is the reference current for the current loop given by

i ref = K p e 2 + K i 0 t e 2 dτ (6)

with K p and K i the proportional and integral gain respectively. The controller u is designed such that the state error e 1 satisfies the error dynamics equation

e ˙ 1 ( t )=α e 1 ( t ) (7)

where α>0 is a design parameter. Using (3), (5)-(7) and the fact that e ˙ 2 = x ˙ 2 , the controller u satisfies

u x 2 L o =α e 1 ( t ) f 1 K p f 2 + K i e 2 (8)

The controller u cannot be implemented since f 1 and f 2 are unknown. However, they can be accurately estimated using a low-pass filter such that

f ^ 1 = f 1 g f ( t ), f ^ 2 = f 2 g f ( t ) (9)

where “ ” is the convolution operator and g f ( t )= 1 { G f ( s ) } is the impulse response of the low-pass filter with G f ( s ) its transfer function and 1 { . } the inverse Laplace transform operator. Replacing f 1 and f 2 by their estimate f ^ 1 and f ^ 2 , respectively we now have

u x 2 L o =α e 1 ( t ) f ^ 1 K p f ^ 2 + K i e 2 (10)

Substitution of the control action given in (10) into the derivative of e 1 ( t ) given in (5) and making use of Equations (3) and (6) yields the following error dynamics

e ˙ 1 ( t )=α e 1 ( t )+ f ˜ 1 ( t )+ K p f ˜ 2 ( t ) (11)

where f ˜ 1 = f 1 f ^ 1 and f ˜ 2 = f 2 f ^ 2 are the estimation errors of the lumped uncertainties. In this work, we consider a strictly proper low-pass filter whose transfer function is

G f ( s )= 1 1+τs (12)

where τ is the time constant of the filter. In view of (9) and (12), the dynamics of the estimates are

τ f ^ ˙ 1 + f ^ 1 = f 1 ,τ f ^ ˙ 2 + f ^ 2 = f 2 (13)

From Equation (13) and using f ^ 1 = f 1 f ˜ 1 , f ^ 2 = f 2 f ˜ 2 we have

f ˜ ˙ 1 = 1 τ f ˜ 1 + f ˙ 1 , f ˜ ˙ 2 = 1 τ f ˜ 2 + f ˙ 2 (14)

Assumption: The first derivatives of the lumped uncertainties are bounded by δ 1 >0, δ 2 >0 with

| f ˙ 1 | δ 1 = sup t[ 0, ) | f ˙ 1 ( t ) |,| f ˙ 2 | δ 2 = sup t[ 0, ) | f ˙ 2 ( t ) | (15)

Such assumption is required for the synthesis of stabilizing controllers for DC-DC converters and is assumed in many studies [16]-[19]. In some situations where we have only step load power and step input voltage changes then we may have f ˙ 1 0, f ˙ 2 0 long after the onset of the step changes.

Using (14) we then have | f ˜ 1 |<τ δ 1 ,| f ˜ 2 |<τ δ 2 and the differential Equation (11) is now bounded by

e ˙ 1 ( t )α e 1 ( t )+τ( δ 1 + K p δ 2 ) (16)

which yields the following bounded error

| e 1 |ϵ= τ( δ 1 + K p δ 2 ) α (17)

In order to achieve small estimation errors for the lumped uncertainties and a lower bound ϵ , the filter time constant τ must be selected very small. However, in practice, it may be limited by the computational capability of the controller and the presence of system noise. In addition, the bound ϵ can be further reduced by the value of the decay rate α that must be chosen high enough to ensure that the motion rate of the current (inner-current loop) is much faster than the motion rate of the output voltage. Using a similar approach as in [20], the substitutions of the estimates given by (9) with f 1 =( x ˙ 1 u x 2 L o ), f 2 = x ˙ 2 from (3) into the control action (10) and the application of the convolution operator result in the following UDE-based controller

u= L o x 2 [ ( K i e 2 α e 1 ) α τ 0 t e 1 dτ e 1 τ K p V ref τ ] (18)

3. Stability Analysis

For the stability analysis, we consider the converter to be free of parasitics, since in this case the destabilizing effect of the CPL is more pronounced [5]. Using x 2 = V ref e 2 , the controller (18) can be written as

u= a * e 1 + b * e 2 c * 0 t e 1 dτ d * V ref V ref e 2 (19)

where

a * = L o ( α+ 1 τ ), b * = L o K i , c * = L o α τ , d * = L o K p τ (20)

Using x 1 = e 1 + i ref = e 1 + K p e 2 + K i 0 t e 2 dτ with x ˙ 2 = e ˙ 2 , the evolution of the states e 1 and e 2 are are determined by the following dynamics

e ˙ 1 =( 1u ) V ref e 2 L + E L K i e 2 + K p ( 1u ) e 1 + K p e 2 + K i e 22 C K p P C( V ref e 2 ) (21)

and

e ˙ 2 =( 1u ) e 1 + K p e 2 + K i e 22 C + P C( V ref e 2 ) (22)

where the controller u is given in (18) and the state variables e 11 and e 22 defined as

e 11 = 0 t e 1 dτ , e 22 = 0 t e 2 dτ (23)

In this case we have

e ˙ 11 = e 1 e ˙ 22 = e 2 (24)

Solving for the equilibrium point ( e 1 , e 2 , e 11 , e 22 )=( e 1 * , e 2 * , e 11 * , e 22 * ) and considering that i ref ( t ) has a constant value I ref , the overall system (21), (22) and (24) admits the following equilibrium

e 1 * =0, e 2 * =0, e 11 * = V ref c * d * V ref c * + P c * I ref , e 22 * = I ref K i (25)

where I ref = P E .

Proving the stability of the overall system is a difficult task. Therefore, the stability analysis will be based on linearization, a classical method adopted in many stability analysis of DC-DC converters such as in the work of [10]. The closed-loop linearization of the error dynamics of the system including the estimator errors (14) around the equilibrium yields

[ e ˜ ˙ 11 e ˜ ˙ 1 e ˜ ˙ 22 e ˜ ˙ 2 f ˜ ˙ 1 f ˜ ˙ 2 ]=[ 0 1 0 0 0 0 a 1 a 2 a 3 a 4 0 0 0 0 0 1 0 0 b 1 b 2 b 3 b 4 0 0 0 0 0 0 1 τ 0 0 0 0 0 0 1 τ ][ e ˜ 11 e ˜ 1 e ˜ 22 e ˜ 2 f ˜ 1 f ˜ 2 ]+[ 0 0 0 0 1 1 ][ 0 0 0 0 f ˙ 1 f ˙ 2 ] (26)

where e ˜ 11 = e 11 e 11 * , e ˜ 1 = e 1 e 1 * , e ˜ 22 = e 22 e 22 * and e ˜ 2 = e 2 e 2 * .

With

a 1 = K p c * I ref V ref C c * L , a 2 = k p C + k p a * I ref C V ref k p u o C a * L , a 3 = K p K i C ( 1 u o ), a 4 = ( b * +1 ) L K i + K p 2 ( 1 u o ) C K p ( b * + u o ) I ref C V ref , b 1 = c * I ref C V ref , b 2 = 1 C ( 1 u o ) a * I ref C V ref b 3 = K i C ( 1 u o ), b 4 = K p C ( 1 u o )+ ( b * + u o ) I ref C V ref + P C V ref 2 (27)

where a * , b * and c * are given in (20) and u o =1 E V ref and I ref = P E .

The parameters of the controller α,τ, K p and K i can be chosen to ensure the stability of the error dynamics driven by f ˙ 1 and f ˙ 2 . If the rate of changes of these uncertainties are bounded, then bounded input-bounded output (BIBO) stability is ensured and in this situation, the output may suffer from small steady state errors. On the other hand, if lim t0 f ˙ 1 =0 , lim t0 f ˙ 2 =0 , then in this case local asymptotic stability of the error dynamics is ensured.

Also, for slow time-varying lumped uncertainties, with the use of a filter with very broad bandwidth, we can reasonably assume that f ˜ 1 0 and f ˜ 2 0 and this case, the error dynamics (11) reduced to

e ˙ 1 ( t )=α e 1 ( t ) (28)

For simplicity, we assume that (28) holds. Please note that this assumption is made only to facilitate the determination of the stabilizing controller gains.

In view of (28), e 1 0 with a decay rate α>0 that can be chosen large enough to ensure that the motion rate of the current (inner-current loop) is much faster than the motion rate of the output voltage. In this case, we can assume that e 1 =0 and e 11 = e 11 * in the linearization of the system given by (22) and the second Equation of (24) around the equilibrium ( e 2 * , e 22 * )=( 0, I ref K i ) . This linearization yields

[ e ˜ ˙ 22 e ˜ ˙ 2 ]=[ 0 1 b 3 b 4 ][ e ˜ 22 e ˜ 2 ] (29)

where b 3 and b 4 are defined in (27). For the equilibrium ( e 2 * , e 22 * ) to be asymptotically stable we must have

b 3 <0, b 4 <0 (30)

It is easily shown that if

K i >0 (31)

then b 3 <0 . Also if

K p >β= ( L o K i + u o ) I ref V ref +P ( 1 u o ) V ref 2 (32)

then b 4 <0 .

4. Controller Parameters Selection

The implementation of the controller given in (18) requires the proper selection of K p , K i ,α,τ and could be determined as follows:

Step 1. Determination of K p and K i .

The proportional gain K p and the integral gain K i that defines the reference current given in (6) are determined to meet a desired percent overshoot, PO , and a settling time, T s , for the linear second-order system given by (29). In this case, the nominal values E o , L o , C o , P o are used in the linear model.

For a specified percent overshoot PO and using a 2% criterion settling time T s , we have the following relationships

ζ= Ln( PO 100 ) π 2 +L n 2 ( PO 100 ) , ω n = 4 T s ζ (33)

where ω n is the undamped natural frequency and ζ is the damping factor. In this case, we can determine the values of b 3 = ω n 2 and b 4 =2ζ ω n given in (27). From b 3 , we can solve for K i as

K i = C o ω n 2 1 u o * (34)

we substitute the expression of K i given in (34) into the expression of b 4 given in (27) and solve for K p

K p = C o 1 u o * [ 2ζ ω n + a o   I ref C o V ref + P o C o V ref 2 ] (35)

where

I refo = P o V ref , u o * =1 E o V ref , a o = L o C o ω n 2 1 u o * + u o * (36)

The calculated gain K p must satisfy condition (32). If it is not, then the percent overshoot and/or the settling time must be changed.

Step 2. Determination of α .

The selection of the controller gains that ensure control saturation avoidance is a very complex problem. In this step, a possible judicious selection of the decay rate α that ensures 0<u( 0 )<1 during the start-up phase is outlined. Using (2), (5), (6) and (28), we have e 1 ( t )= e 1 ( 0 ) e αt with e 1 ( 0 )= K p e 2 ( 0 )<0 . Substitution of e 1 ( t ) into the controller u given in (18), the decay rate α to guarantee u( 0 )0 is

α= α 1 = K p V ref τ K i e 2 ( 0 ) | e 1 ( 0 ) | 1 τ (37)

The decay rate for u( 0 )1 is

α= α 2 = E o L o + K p V ref τ K i e 2 ( 0 ) | e 1 ( 0 ) | 1 τ (38)

A possible choice of the decay rate is

α=0.5( α 1 + α 2 ) (39)

Step 3. Determination of the filter time constant τ .

The time constant of the filter τ must satisfy the condition

τ< τ max = K p x 2 ( 0 ) K i ( V ref x 2 ( 0 ) ) (40)

to ensure that α 1 >0 . Good estimates of the lumped uncertainties require that τ must be as small as possible. However, in practice, its value is determined by the computational capability of the controller and the system noise. In this case, we can choose τ

τ= τ max q (41)

where q>1 is a design parameter. The final designed controller must also be a stabilizing controller for the overall system given in (26).

Figure 2 is the block diagram of the proposed UDE-based robust nonlinear control.

Figure 2. Block diagram of the proposed UDE-based robust nonlinear control.

5. Simulation Results

The effectiveness of the proposed controller is validated using the Matlab/Simulink package and is also compared against the controller developed in [10] where the actual boost converter parameters considered are

L=326μH,C=20μF,P=1000W,E=200V (42)

They are assumed unknown in the implementation of the proposed controller. The switching frequency is 100 kHz and V ref =350V . The simulations are performed using the switched system model instead of the averaged model.

To test the robustness of the two controllers to parameter uncertainties, they are designed using the following nominal parameters

L o =163μH, C o =40μF, P o =800W, E o =240V (43)

To account for the conduction losses, we consider the parasitics of the boost converter as

R l =3Ω, R DS =0.5Ω, V D =0.7V, R D =0.75Ω, R C =0.2Ω (44)

The proposed controller is designed for a settling time of T s =2.0ms and a percent overshoot of PO=15% for the linear second-order system given by (29) using the nominal parameter values for the converter. Using Section 4 with q=4 , the parameters of the controller are

K p =0.250, K i =873.2,α=37.4× 10 3 ,τ=156μs (45)

The calculated K p =0.250 satisfies condition (32) which in this case is K p >0.0158 .

The controller proposed in [10] is given by

u= V ref E V ref + K p ( P ^ E x 1 ), P ^ ˙ = K E ( V ref x 2 ) 1+ K A ( V ref x 2 ) 2 (46)

where P ^ is the load estimate. With K p =0.01 and K E =40× 10 3 . The parameter K A was not provided in the paper. A choice of K A =4× 10 4 gave similar responses to the ones reported in [10].

Figure 3 depicts the responses of the converter subject to the controller (46) of [10] and to the proposed controller given by (18). The converter is subject to step input voltage changes from 200 V to 220 V at t=0.02s and then back to 200 V at t=0.03s and step load power changes from 1000 W to 500 W at t=0.04s and then back to 1000 W at t=0.050s . The maximum output variation is 6.1 V with the input disturbance rejected in 1.80 ms with the proposed controller and 30 V and 5.62 ms with the controller of [10]. The maximum output variation is 9 V with the power disturbance rejected in 2.3 ms with the proposed controller and 26 V with 5.34 ms with the controller of [10]. Figure 4, and Figure 5 depict the plot of the inductor current x 1 and the proposed controller u respectively.

Figure 3. Output voltage transient responses due to stepwise input and load power changes using the proposed controller in color red and the controller reported in [10] in color black.

Figure 4. Inductor current x 1 .

Figure 5. The waveform of the proposed controller u.

To test the robustness to time-varying load powers, the converter is subject to the time-varying load power profile shown in Figure 6. Figure 7 depicts the output responses showing an average DC offset error of 3.2 V with the controller of [10] and 35 mV with the proposed controller. For the robustness to external disturbances, the converter is subject to a sawtooth load power disturbance of 200 W amplitude and a frequency of 25 Hz shown in Figure 8. Figure 9 depicts the output responses showing an average DC offset error of 1.3 V with the controller of [10] and 100 mV with the proposed controller. We should note that the assumption given in (15) is satisfied with the time-varying external disturbances used in this work.

Figure 6. Time-varying load power variations.

Figure 7. Output voltage response of the converter due to time-varying load power changes using the proposed controller in color red and the controller reported in [10] in color black.

Figure 8. Load power with a sawtooth disturbance of amplitude 200 W and frequenct of 25 Hz.

Figure 9. Output voltage response of the converter due to time-varying disturbance using the proposed controller in color red and the controller reported in [10] in color black.

For both controllers, the output voltage is accurately tracking the reference voltage for step input voltages and step output power loads. The power load estimate P ^ of [10] exhibits a very large steady state error with respect to the actual power P in order to absorb the effects of the external disturbances, the parameter uncertainties and the parasitics of the converter. As this example illustrates, taking them into account, a fast estimator is designed that is intrinsic and embedded in a single control law (18) that is capable of dynamically compensating for the external disturbances, the parasitics and the parameter uncertainties, and thus delivering a much better disturbance suppression than the proposed controller of [10].

6. Conclusion

In this work, a UDE-based controller is designed for the DC-DC boost converter where the load power and input voltage variations, the parasitics and the uncertainties of the converter are unknown but taken into account in the development of a robust controller that is simple and easy to design. A systematic procedure is developed to select the controller gains to achieve a satisfactory output response. Using simulation, the effectiveness of the proposed controller is compared against the recent nonlinear robust controller of [10]. Future work will be to validate the proposed controller experimentally and perform the stability analysis of the non-linear closed-loop system instead of the linearized one.

Conflicts of Interest

The authors declare no conflicts of interest regarding the publication of this paper.

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