Design of Low Power and High Speed CMOS Comparator for A/D Converter Application

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Wireless Engineering and Technology

ISSN Print: 2152-2294
ISSN Online: 2152-2308
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E-mail: wet@scirp.org

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"Design of Low Power and High Speed CMOS Comparator for A/D Converter Application"
written by Shubhara Yewale, Radheshyam Gamad,
published by Wireless Engineering and Technology, Vol.3 No.2, 2012

has been cited by the following article(s):

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[8]	Design of Low Power & High Speed Comparator of SAR ADC using 180nm Technology
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[9]	Approach for low power high speed 4‐bit flash analogue to digital converter
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[13]	A New Approach for Low Power High Speed 4-Bit Flash Analog-to-Digital Converter
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[14]	12-bit 3.072 GS/s 32-Way Time-Interleaved Pipelined ADC with Digital Background Calibration for Wideband Fully Digital Receiver Application in 65-nm …
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[15]	A High-Gain, Low-Power Latch Comparator Design for Oversampled ADCs
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[16]	Reconfigurable Flash ADC Using TIQ Technique
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[17]	Récolte d'énergie provenant des bus ARINC825 pour les applications en avionique
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[18]	THE DESIGN OF A HIGH FREQUENCY PULSE WIDTH MODULATION INTEGRATED CIRCUIT WITH EXTERNAL SYNCHRONIZATION CAPABILITY
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[19]	DESIGN AND IMPLEMENTATION OF HIGH SPEED LATCHED COMPARATOR USING gm/Id SIZING METHOD
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[20]	Design of Low Power Preamplifier Latch Based Comparator
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[21]	Development of a Position Decoding ASIC for SPECT using Silicon Photomultiplier
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[22]	A CMOS 7Gb/s, 4-PAM and 4-PWM, serial link transceiver
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[23]	Design and Analysis of a Low-Voltage Double-Tail Comparator for Flash ADC at 180nm and 90nm CMOS Technology
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[24]	Review on Comparator Design for High Speed ADCs
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[25]	Digitally Enhanced Smart Analog Circuits
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[26]	Design of new implantable stimulator chip (SoC) for non-invasive/minimally invasive biomedical application
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[27]	A Perspective Survey on Double Tail Comparator
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[28]	Current Mode Comparator Design for Biomedical Applications
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[29]	A NOVEL DESIGN OF 9-BIT PIPELINE ADC
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[30]	Design of Low Power & High Speed Comparator with 0.18 µm Technology for ADC Application
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[31]	Low Power and High Speed CMOS Comparator for A/D Converter Applications-A Review
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[32]	Performance Analysis of 4-bit Flash ADC with Different Comparators Designed in 0. 18um Technology
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[33]	A User Programmable Battery Charging System
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[1]	A Low Power, High Speed Improved By Dynamiclatchcomparator For Biomedical Acquisition System Using 180nm CMOS Technology 2023 First International Conference on Advances in Electrical, Electronics and Computational Intelligence (ICAEECI), 2023 DOI:10.1109/ICAEECI58247.2023.10370904

[2]	Design and Analysis of Low Power, High Speed, Leakage Control Comparator using 180nm Technology For A/D Converters 2021 IEEE Madras Section Conference (MASCON), 2021 DOI:10.1109/MASCON51689.2021.9563522

[3]	Approach for low power high speed 4-bit flash analogue to digital converter IET Circuits, Devices & Systems, 2020 DOI:10.1049/iet-cds.2018.5504

[4]	12 bit 3.072 GS/s 32‐way time‐interleaved pipelined ADC with digital background calibration for wideband fully digital receiver application in 65 nm complementary metal–oxide–semiconductor IET Circuits, Devices & Systems, 2020 DOI:10.1049/iet-cds.2019.0069

[5]	Design of Low Power & High Speed Comparator of SAR ADC using 180nm Technology 2020 4th International Conference on Electronics, Communication and Aerospace Technology (ICECA), 2020 DOI:10.1109/ICECA49313.2020.9297473

[6]	Reconfigurable Flash ADC Using TIQ Technique 2018 4th International Conference on Computing Sciences (ICCS), 2018 DOI:10.1109/ICCS.2018.00041

[7]	A High-Gain, Low-Power Latch Comparator Design for Oversampled ADCs 2018 5th International Conference on Signal Processing and Integrated Networks (SPIN), 2018 DOI:10.1109/SPIN.2018.8474156

[8]	Development of a Position Decoding ASIC for SPECT using Silicon Photomultiplier Journal of Instrumentation, 2016 DOI:10.1088/1748-0221/11/01/C01065

[9]	A CMOS 7Gb/s, 4-PAM and 4-PWM, serial link transceiver Analog Integrated Circuits and Signal Processing, 2016 DOI:10.1007/s10470-016-0779-0

[10]	Review on Comparator Design for High Speed ADCs 2015 International Conference on Computing Communication Control and Automation, 2015 DOI:10.1109/ICCUBEA.2015.206

[11]	Design of new implantable stimulator chip (SoC) for non-invasive / minimally invasive biomedical application 2014 International Conference on Communication and Signal Processing, 2014 DOI:10.1109/ICCSP.2014.6949810

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