has been cited by the following article(s):
[1]
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A reduced reference spur multiplying delay-locked loop
International Journal of Circuit Theory and Applications,
2016
DOI:10.1002/cta.2176
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[2]
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A reduced reference spur multiplying delay‐locked loop
International Journal of Circuit Theory and Applications,
2016
DOI:10.1002/cta.2176
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