Dr. Lu Peng

Louisiana State University, USA

Email: lpeng@lsu.edu

Qualifications

2005  Ph.D., University of Florida

2000  M.E., Shanghai Jiaotong University, China

1995  B.E., Shanghai Jiaotong University, China

Publications (selected)

1. L. Peng, L. Yang and B. Ramadass*, “Architectural Support for Enhancing Critical Secrets Protection in Chip-Multiprocessors,” In “Pervasive Information Security and Privacy Developments: Trends and Advancements,” IGI Global Press, ISBN-13: 9781616920005, ISBN: 1616920009, Jul. 2010.
2. G. Liu*, Z. Huang*, J.-K. Peir, X. Shi and L. Peng, “Enhancement for Accurate and Timely Stream Prefetching,” Journal of Instruction-Level Parallelism, To appear in the late of 2010.
3. S. Verma*, D. Koppelman, and L. Peng, “An Investigation of Hybrid and Adaptive Prefetching Schemes,” Journal of Instruction-Level Parallelism, To appear in the late of 2010.
4. B. Li, L. Duan* and L. Peng, “Efficient Microarchitectural Vulnerabilities Prediction Using Boosted Regression Trees and Patient Rule Inductions,” In IEEE Transactions on Computers, Special Issue on System Level Design of Reliable Architectures, vol. 59(5), May 2010, pp. 593-607.
5. R. Tao*, L. Yang, L. Peng, and B. Li, “A Host-Based Intrusion Detection System Using Architectural Features to Improve Sophisticated Denial-of-Service Attack Detections,” In International Journal of Information Security and Privacy, vol. 4(1), Jan.-Mar. 2010, pp. 18-31.
6. Q. Yu, B. Li, Z. Fang and L. Peng, “An adaptive sampling scheme guided by BART - with an application to predict processor performance,” In Canadian Journal of Statistics, vol. 38(1), Mar. 2010, pp. 136–152.
7. Y. Zhang*, L. Peng, W. Lu, L. Duan* and S. Rai, “Expediating IP Lookups with Reduced Power via TBM and SST Supernode Caching,” In Computer Communications, vol. 33(3), Feb. 2010, pp. 390-397.
8. B. Li, L. Peng and B. Ramadass*, "Accurate and Efficient Processor Performance Prediction via Regression Tree Based Modeling," In Journal of Systems Architecture, vol. 55 (10-12), Oct.-Dec., 2009, pp. 457-467.
9. L. Peng, J-K. Peir, T. K. Prakash*, C. Staelin, Y-K. Chen, D. Koppelman, “Memory Hierarchy Performance Measurement of Commercial Dual-Core Desktop Processors”, In Journal of Systems Architecture, vol. 54(8),Aug. 2008, pp. 816-828.
10. T. K. Prakash* and L. Peng, “Performance Characterization of SPEC CPU2006 Benchmarks on Intel Core 2 Duo Processor,” In ISAST Transactions on Computers and Software Engineering, No. 1, vol. 2, 2008, pp. 36-41.
11. L. Yang, L. Peng and B. Ramadass*, “SecCMP: Enhancing Critical Secret Protection in Chip-Multiprocessors,” In International Journal of Information Security and Privacy, vol.2(4), Oct.-Dec. 2008, pp. 54-66.
12. L. Peng, J-K. Peir and K. Lai, "A New Memory Hierarchy Layer for Zero-cycle Load". In Journal of Instruction- Level Parallelism, vol.6, Sep. 2004, (22 pages). (Acceptance rate: 15%)
13. L. Peng, J-K. Peir, Q. Ma and K. Lai, "Address-Free Memory Access Based on Program Syntax Correlation of Loads and Stores", In IEEE Transactions on VLSI systems, vol. 11(3), Jun. 2003, pp. 314-324. (Invited Paper)

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