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DOI
Author
Journal
Affiliation
ISSN
Subject
Jitter Reduced Self Biased PLLs—A Systematic Simulation Study
(Articles)
J. Dhurga Devi
Circuits and Systems
Vol.7 No.5
,April 29, 2016
DOI:
10.4236/cs.2016.75045
2,297
Downloads
3,801
Views
Citations
This article belongs to the Special Issue on
Circuit Design
A Modified PFD Based PLL with Frequency Dividers in 0.18-µm CMOS Technology
(Articles)
N. K. Anushkannan
,
H. Mangalam
Circuits and Systems
Vol.7 No.13
,November 18, 2016
DOI:
10.4236/cs.2016.713343
2,390
Downloads
5,708
Views
Citations
VLSI Implementation for Low Noise Power Efficiency Cellular Communication Systems
(Articles)
Rondia MACK
,
Maher RIZKALLA
,
Paul SALAMA
,
Mohamed EL-SHARKAWY
Wireless Sensor Network
Vol.2 No.1
,January 12, 2010
DOI:
10.4236/wsn.2010.21003
5,912
Downloads
10,878
Views
Citations
Research on Seamless Switching Control Strategy Based on Virtual Synchronous Generator
(Articles)
Wei Kang
,
Jibo Wan
,
Lixia Zhang
,
Qilong Zhang
Energy and Power Engineering
Vol.9 No.4B
,April 6, 2017
DOI:
10.4236/epe.2017.94B049
3,145
Downloads
4,827
Views
Citations
A Static Phase Offset Reduction Technique for Multiplying Delay-Locked Loop
(Articles)
Xinjie Wang
,
Tadeusz Kwasniewski
Circuits and Systems
Vol.6 No.1
,January 21, 2015
DOI:
10.4236/cs.2015.61002
4,355
Downloads
5,844
Views
Citations
Dual-Delay-Path Ring Oscillator with Self-Biased Delay Cells for Clock Generation
(Articles)
Agord de Matos Pinto Jr
,
Raphael Ronald Noal Souza
,
Mateus Biancarde Castro
,
Eduardo Rodrigues de Lima
,
Leandro Tiago Manêra
Circuits and Systems
Vol.14 No.6
,June 30, 2023
DOI:
10.4236/cs.2023.146003
192
Downloads
948
Views
Citations
A Synchronized Grid Integrated Three-Phase Inverter with a Renewable Source for Power Sharing
(Articles)
Zuhair Alqarni
,
Johnson A. Asumadu
Journal of Power and Energy Engineering
Vol.8 No.3
,March 31, 2020
DOI:
10.4236/jpee.2020.83006
1,155
Downloads
4,354
Views
Citations
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