304 V. M. SRIVASTAVA ET AL.
doi:10.1109/22.826840
[13] J. Gao and A. Werthof, “Scalable Small-Signal and Noise
Modeling for Deep-Submicrometer MOSFETs,” IEEE
Transaction Microwave Theory and Technology, Vol. 57,
No. 4, 2009, pp. 737-744.
doi:10.1109/TMTT.2009.2015075
[14] Y. Cheng, J. Deen and C. H. Chen, “MOSFET Modeling
for RF IC Design,” IEEE Transaction Electron Devices,
Vol. 52, No. 7, 2005, pp. 1286-1303.
doi:10.1109/TED.2005.850656
[15] D. R. Pehlke, M. Schroter and A. Burstein, “High-Fre-
Quency Application of MOS Compact Models and Their
Development for Scalable RF Model Libraries,” Procee-
ding of Custom Integrated Circuits Conference, 1998, pp.
219-222. doi:10.1109/CICC.1998.694967doi:./ ..
[16] V. M. Srivastava, K. S. Yadav and G. Singh, “Analysis of
Double-Gate CMOS for Double-Pole Four-Throw RF
Switch Design at 45 nm Technology,” Computational
Electronics, Vol. 10, No. 1-2, June 2011, pp. 229-240.
doi:10.1007/s10825-011-0359-6
[17] Y. Cheng and M. Matloubian, “High Frequency Charac-
terization of Gate Resistance in RF MOSFETs,” IEEE
Electron Device Letters, Vol. 22, No. 2, 2001, pp. 98-100.
doi:org/10.1007/s10825-011-0359-6
[18] X. Jin, J. J. Ou and C. H. Chen, “An Effective Gate Re-
sistance Model for CMOS RF and Noise Modeling,”
IEEE Electron Devices Meeting, Vol. 22, No. 2, 1998, pp.
961-964. doi:org/10.1109/55.902844
[19] K. Henry and K. Coumou, “New Direct Measurement
Techniques for Thermal Conductivity, Thermal Diffusiv-
ity, and Specific Heat of Advanced Materials,” Ther-
mochimica Acta, Vol. 192, December 1991, pp. 129-134.
doi:org/10.1016/0040-6031(91)87154-O
[20] L. Gaioni, M. Manghisoni, L. Rattia, V. Reb, V. Spezialia
and G. Traversi, “Instrumentation for Gate Current Noise
Measurements on Sub-100 nm MOS Transistors,” Pro-
cedingof Topical Workshop on Electronics for Particle
Physics, Greece, Vol. 192, No. 12, 15-19, September 2008,
pp. 436-440.
[21] V. M. Cvjetkovic, M. S. Matijevic, M. D. Grujovic and
M. Z. Stefanovi, “Helicopter Laboratory Model Experi-
ment with Web Access,” International Journals of On-
line Engineering, Vol. 5, No. 1, 2009, pp. 148-153.
[22] A. Grout and R. D. Silva, “Remote Laboratory Description
Language Based on XML,” Online Engineering, Vol. 5,
No. 1, 2009, p. 25.
[23] B. Pradarelli, L. Latorre and P. Nouet, “Integrated
Circuits Testing: Remote Access to Test Equipment for
Labs and Engineering,” International Journals of Online
Engineering, Vol. 5, No. 1, 2009, pp. 43-50.
[24] David Lowe, Chris Berry, Steve Murray, and Euan
Lindsay, “Adapting a Remote Laboratory Architecture to
Support Collaboration and Supervision,” International
Journals of Online Engineering, Vol. 5, No. SI-1, 2009,
pp. 51-56.
[25] S. C. Pandey, A. Maiti, T. K. Maiti and C. K. Maiti, “Online
MOS Capacitor Characterization in LabVIEW Environ-
ment,” International Journals of Online Engineering, Vol.
5, No. 1, 2009, pp. 57-60.
[26] P. S. Dasa and A. Biswas, “Improved Electrical and In-
terfacial Properties of RF Sputtered HfAlOx on N-GaAs
with Effective Si Passivation,” Applied Surface Science,
Vol. 25, No. 6, 2010, pp. 6618-6625
doi:10.1016/j.apsusc.2010.04.058
[27] E. Orgiu, S. Locci, B. Fraboni, E. Scavetta, P. Lugli and
A. Bonfiglio, “Analysis of the Hysteresis in Organic
Thin-Film Transistors with Polymeric Gate Dielectric,”
International Journals of Online Engineering, Vol. 12,
2011, pp. 477-485.
[28] Y. N. Yu, L. L. Sun and J. Liu, “RF CMOS Modeling: A
Scalable Model of RF-MOSFET with Different Numbers
of Fingers,” Journal of Semiconductors, Vol. 12, No. 3,
November 2010, pp. 477-485.
doi:10.1088/1674-4926/31/11/114007
[29] C. Cao and K. O. Kenneth, “A 90 GHz Voltage Con-
trolled Oscillator with a 2.2 GHz Tuning Range in a 130
nm CMOS Technology,” Proceeding of Sump VLSI Cir-
cuits Dig Technology, 2005, p. 242.
doi:10.1109/VLSIC.2005.1469376
[30] C. Y. Chan, S. C. Chen and M. H.Tsai, “Wiring Effect
Optimization in 65 nm Low-Power NMOS,” IEEE Elec-
tron Device Letters, Vol. 29, No. 11, 2008, p. 1245.
doi:10.1109/LED.2008.2005515
[31] V. M. Srivastava, K. S. Yadav and G. Singh, “Design and
performance Analysis of Double-Gate MOSFET Over
Single-Gate MOSFET for RF Switch,” Microelectronics
Journals, Vol. 42, No. 3, March 2011, pp. 527-534.
doi:10.1016/j.mejo.2010.12.007
[32] M. S.Viranjay, K. S. Yadav and G. Singh, “Performance
of Double-Pole Four-Throw Double-Gate RF CMOS
Switch in 45-nm Technology,”International Journals of
Wireless Engineering and Technology, Vol. 1, No. 2,
Octorber 2010, pp. 47-54. doi:10.4236/ wet.2010.12008
[33] P. H. Woerlee, M. J. Knitel, R. Langevelde, D. Klaassen,
L. F. Tiemeijer and A. J. Scholten, “RF CMOS Perform-
ance Trends,” IEEE Transaction on Electron Devices,
Vol. 48, No. 8, August 2001, pp. 1776-1782.
doi:10.1109/16.936707
[34] K. K. Koichiand, “Numerical Analysis of Switching
Characteristics in SOI MOSFET,” IEEET Transaction on
Electron Devi ces, Vol. 33, February 1986, pp. 133-139.
doi:10.1109/T-ED.1986.22449
[35] E. H. Nicollian and J. R. Brews, “MOS Physics and
Technology,” Wiley, New York, 1982.
[36] Viranjay M. Srivastava, K. S. Yadav and G. Singh, “Dou-
ble-Pole Four-Throw RF CMOS Switch Design with
Double-Gate Transistor,” Proceeding of 2010 Annual
IEEE India Conference (INDICON-2010), 17-19
December 2010, India, pp. 1-4.
doi:10.1109/INDCON.2010.5712754
[37] S. M. Sze, “Physics of Semiconductor Devices”, 2nd
Edition, Wiley, New York, 1985.
[38] V. M. Srivastava, K. S. Yadav and G. Singh, “Design and
Performance Analysis of Cylindrical Surrounding Dou-
ble-Gate MOSFET for RF Switch,” Microelectronics
Journal, Vol. 42, No. 9, September 2011, pp. 1025-1036.
Copyright © 2011 SciRes. WSN