TITLE:
Parallel Self-Timed Adder with Lookahead-Carry Generator
AUTHORS:
Mohammad Ashfak Habib
KEYWORDS:
Arithmetic Circuit, Binary Adder, Asynchronous Circuit, Self-Timed Adder, Parallel Prefix Adder
JOURNAL NAME:
Open Access Library Journal,
Vol.7 No.9,
September
23,
2020
ABSTRACT:
Parallel self-timed adder (PASTA) is a newly introduced asynchronous adder. It shows appreciable average-case performance without any special speedup circuitry or look-ahead schema, but its worst-case performance is almost similar to that of ripple carry adder. It is therefore an important research issue to find a technique to improve its worst-case performance without any significant compromise in its other performances. This paper investigates the possibility of such performance improvement of the basic architecture of PASTA by changing its carry propagation schema. The existing ripple fashioned carry propagation schema is replaced by four different lookahead-carry generators. Four different implementations of PASTA with four different types of lookahead-carry generators are presented. The carry propagation delays of the proposed implementations are compared with that of the basic implementation of PASTA. More impressive worst case performances are found for the proposed implementations. The amount of improvement is minimum 45.25% and maximum 61.09%. The proposed designs are regular and do not have any practical limitations of fan-ins or fan-outs. Simulation-based results validate the practicality as well as the superiority of the proposed architecture over the existing architecture of PASTA.