has been cited by the following article(s):
[1]
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Fast and energy-efficient FPGA realization of RNS reverse converter for the ternary 3-moduli set {3n–2, 3n–1, 3n}
SN Applied Sciences,
2020
DOI:10.1007/s42452-020-2040-9
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[2]
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Implementing the Residue Logarithmic Number System Using Interpolation and Cotransformation
IEEE Transactions on Computers,
2020
DOI:10.1109/TC.2019.2930514
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[3]
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Under- and Overflow Detection in the Residue Logarithmic Number System
2019 IEEE 26th Symposium on Computer Arithmetic (ARITH),
2019
DOI:10.1109/ARITH.2019.00030
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[4]
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One-Hot Residue Logarithmic Number Systems
2019 29th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS),
2019
DOI:10.1109/PATMOS.2019.8862159
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