Design of Low Power CMOS LNA with Current-Reused and Notch Filter Topology for DS-UWB Application

Meng-Ting Hsu, Jhih-Huei Du, Wen-Chen Chiu

Microwave Communication and Radio Frequency Integrated Circuit Lab., Department and Institute of Electronic Engineering, National Yunlin University of Science and Technology, Yunlin, Taiwan, Chinese Taipei..

DOI: 10.4236/wet.2012.33024                

Abstract

This paper presents the design of a low power LNA with second stage that uses a notch filter for DS-UWB application. The LNA employs a current reuse structure to reduce the power consumption and an active second order notch filter to produce band rejection in the 5 - 6 GHz frequency band. The input reflection coefficient S11 and output reflection S22 are both less than –10 dB. The maximum power gain S21 is 15 dB while the maximum rejection ratio is over –10 dB at 4.8 GHz. The minimum noise figure is 5 dB. The input referred third-order intercept point (IIP3) is –7 dBm at 6 GHz. The power consumption is 6.4 mW from a 1-V power supply.

Keywords

Low Noise Amplifier (LNA); Low Power; Low Voltage; Ultra-Wideband (UWB); Active Notch Filter

1. Introduction

Recently, the Federal Communications Commission (FCC) in the US approved the use of ultra-wideband (UWB) technology for commercial applications from 3.1 GHz to 10.6 GHz. The UWB transmission system has two major proposed applications, direct-sequence ultra-wideband (DS-UWB) and multi-band orthogonal frequency division multiplexing (MB-OFDM). The band definition of DS-CDMA is illustrated in Figure 1(a) which extends from 3.1 to 4.9 GHz and 6 to 9.7 GHz, and MB-OFDM is defined as the range from 3168 MHz to 10296 MHz which is shown in Figure 1(b). The band range of 5 - 6 GHz is not considered in the current UWB system which is caused by the 802.11a wireless local area network (WLAN). UWB performs excellently for short-range high-speed uses, such as automotive collision-detection systems, through-wall imaging systems, and high-speed indoor networking, and plays a more and more important role in communication system applications. Low power consumption is one of the most important design concerns in the applications of this technology [1].

There are several existing topologies that have been proposed for wide-band amplifiers. The most important characteristics are that distributed amplifiers (DAs) provide good impedance matching, flat gain over a very wide range of bandwidth, and higher third-order inter modulation products (IIP3). However, the distributed amplifiers usually consume a lot of power, provide only medium gain, and occupy a large chip area [2].

Resistive shunt feedback amplifiers can provide good wideband impedance matching and improve good flatness at the expense of gain. However, a very wide bandwidth range with low noise and high gain is hard to achieve. Recently, LC-ladder matching, and band-pass Chebyshev or Butterworth filter networks have been proposed for a low-power UWB low noise amplifiers (LNA) in a 0.18 μm CMOS process [3]. It provides wideband input matching and a minimum noise figure of 4 dB under 9 mW power consumption. However, the noise figure (NF) rises rapidly at high frequencies, ranging from 5 - 8 dB in the band of 7 - 10 GHz. In addition, this topology needs a large number of high-Q inductors at the input node, so it is difficult to realize them in a small area. Therefore, it must have flat gain over the entire bandwidth, good linearity, minimum possible noise figures and low power consumption.

This paper focuses on the design and implementation of a common gate low noise amplifier (CGLNA) in a 0.18 μm CMOS process technology for DS-UWB applications. In order to minimize the undesired frequency, the active notch filter is adopted to provide a deep rejection ratio at 5.5 GHz. Recently, the research into circuits with multi-function operation capability is a hot topic. Our proposed circuit is multi-function circuit which it simultaneously performs a UWB signal amplifying and

(a)(b)

Figure 1. Spectrum allocated for UWB communication. (a) DS-CDMA; (b) MB-OFDM.

notch filtering function. In the first step, we design the UWB amplifying circuit. In the second step, the notch filter is added properly. The input impedance, noise, gain and notch filter of UWB LNAs are discussed in Section 2. Section 3 presents the final schematic of the proposed LNA. Finally, the measurements and simulation results of the UWB LNA are discussed in Section 4, which is followed by conclusions in Section 5.

2. LNA Design Technique

2.1. Input Impedance Matching of Common Gate Amplifier

In the design of LNAs for broadband wireless receivers, there are several issues that need to be investigated. These include low and stable 50 Ω input matching, flat gain with sufficient linearity, NF of the amplifier, and low power consumption, which is needed in portable systems. In this section, input impedance matching, noise analysis, and gain analysis for broadband LNA development is discussed.

Figure 2 shows the circuit with input stage of a common-gate amplifier. The inductor L_S is placed between the source of the MOS transistor and the ground terminal forming an LC resonator with the gate-to-source capacitance C_gs in a common-gate configuration [4]. The finite output resistance of the transistor also changes the input reflection of the LNA. In Figure 2, the load impedance of the common-gate stage and input impedance of the next stage will affect the matching and noise contribution due to the short-channel MOS transistor’s relatively low output resistance which is about 500 Ω for a 0.18 μm CMOS process [6]. The small-signal equivalent circuit for the impedance calculation is shown in Figure 3. From Figure 3, the input impedance can be derived as

Conflicts of Interest

The authors declare no conflicts of interest.

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