CS> Vol.2 No.3, July 2011

 

Copyright © 2011 Saurabh Chaudhury, Anirban Dutta et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

 

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S. Chaudhury and A. Dutta, "Algorithmic Optimization of BDDs and Performance Evaluation for Multi-level Logic Circuits with Area and Power Trade-offs," Circuits and Systems, Vol. 2 No. 3, 2011, pp. 217-224. doi: 10.4236/cs.2011.23031.

 

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