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Number Systems are media for representing numbers; the popular ones being the Weighted Number Systems (WNS), which sometimes propagate carries during arithmetic computations. The other category, Un-Weighted Number Systems, of which the Residue Number System (RNS) belongs, do not carry weights but have not yet found widespread usage in general purpose computing as a result of some challenges; one of the main challenges of RNS is overflow detection and correction. The presence of errors in calculated values due to such factors as overflow means that systems built on this number system will continue to fail until serious steps are taken to resolve the issue. In this paper, a scheme for detecting and correcting overflow during RNS addition is presented. The proposed scheme used mixed radix digits to evaluate the magnitude of the addends in order to detect the occurrence of overflow in their sum. The scheme also demonstrated a simplified technique of correcting the overflow in the event that it occurs. An analysis of the hardware requirements and speed limitations of the scheme showed that it performs considerably better in relation to similar state of art schemes.

The Residue Number System (RNS) has gained prominence in recent years due to its seemingly inherent features such as parallelism and carry-propagation free arithmetic computations. Notwithstanding the fact that, RNS is currently being applied in Digital Signal Processing (DSP) intensive computations like digital filtering, convolutions, correlations, Discrete Fourier Transform (DFT) computations, Fast Fourier Transform (FFT) computations and Direct Digital Frequency synthesis [

An RNS number X, is represented as x i = | X | m i , where m i = { m 1 , m 2 , ⋯ , m n } , a set of pairwise relatively prime integers such that m 1 ≠ m 2 ≠ ⋯ ≠ m n and gcd ( m 1 , m 2 ) , ⋯ , gcd ( m n − 1 , m 1 ) = 1 . The residue set x i = [ x 1 , x 2 , ⋯ , x n ] is uniquely represented provided X lies within the legitimate range [ 0 , M − 1 ] where M = ∏ i = 1 n m i is the Dynamic Range (DR) for the chosen moduli set. Let X and Y be two different integers within the DR, if X ⊙ Y , ( ⊙ are the arithmetic operations + , − , × , ÷ ), results in a value that is outside the legitimate range, then overflow is said to have occurred.

Overflow in general computing occurs if a calculated value is greater than its intended storage location in memory [

The conversion of an RNS number into its decimal/binary equivalent number (a process called reverse conversion) has long been mainly based on the Chinese Remainder Theorem (CRT) and the Mixed Radix Conversion (MRC) techniques with few modifications being their variants of recent times. Whiles the former deals with the modulo-M operation, the later does not but computes sequentially which tends to reduce the complexity of the architecture. Computations can be done using the MRC as follows:

X = e 1 + e 2 m 1 + e 3 m 1 m 2 + ⋯ + e n m 1 m 2 ⋯ m n − 1 (1)

where e i , i = 1 , 2 , ⋯ , n are the Mixed Radix Digits (MRDs) and computed as follows:

e 1 = x 1

e 2 = | ( x 2 − e 1 ) | m 1 − 1 | m 2 | m 2

e 3 = | ( ( x 3 − e 1 ) | m 1 − 1 | m 3 − e 2 ) | m 2 − 1 | m 3 | m 3

⋮

e n = | ( ⋯ ( ( x 3 − e 1 ) | m 1 − 1 | m n − e 2 ) | m 2 − 1 | m n − ⋯ − e n − 1 ) | m n − 1 − 1 | m n | m n (2)

The MRDs e i are within the range 0 ≤ e i ≤ m i , and a positive number, X, in the interval [ 0 , M ] can be uniquely represented. The magnitude of a number can become crucial in the determination overflow in RNS. The sign of an RNS number is determined by partitioning M into two parts: 0 ≤ X < ⌊ M / 2 ⌋ (for positive integers) and ⌊ M / 2 ⌋ ≤ X < M (for negative integers).

Recently, some techniques have been developed to detect overflow without necessarily completing the reverse conversion process; in [

In this paper, a new technique for detecting and correcting overflow during the addition of two RNS numbers for the moduli set { 2 n − 1 , 2 n , 2 n + 1 } is presented; the technique evaluates the sign of an RNS number by performing a partial reverse conversion using the mixed radix conversion method. The sign of the addends is evaluated using only the MRDs, which is then used to detect the occurrence of overflow during RNS addition. The rest of the paper is organized as follows: Section 2 presents the proposed method, an anticipated hardware implementation (albeit theoretical) is presented in Section 3 with its realization in Section 4. Numerical illustrations are shown in Section 5 whiles the performance of the proposed scheme is evaluated in Section 6. The final part of this paper is the conclusion in Section 7.

Given the moduli set { 2 n − 1 , 2 n , 2 n + 1 } , where m 1 = 2 n + 1 , m 2 = 2 n and m 3 = 2 n − 1 , then

M = 2 n ( 2 n + 1 ) ( 2 n − 1 ) (3)

This implies

M / 2 = 2 n − 1 ( 2 n + 1 ) ( 2 n − 1 ) = ( 2 n + 1 ) ( 2 2 n − 1 − 2 n − 1 ) (4)

Lemma 1: Given the moduli set { 2 n − 1 , 2 n , 2 n + 1 } , where m 1 = 2 n + 1 , m 2 = 2 n and m 3 = 2 n − 1 for every integer n > 1 , the following hold true [

| m 1 − 1 | m 2 = 1 (5)

| m 2 − 1 | m 3 = 1 (6)

| m 1 − 1 | m 3 = 2 n − 1 (7)

Therefore, we can re-write (2) as;

e 1 = x 1

e 2 = | ( x 2 − e 1 ) 1 | 2 n = | x 2 − x 1 | 2 n

e 3 = | ( ( x 3 − e 1 ) 2 n − 1 − e 2 ) 1 | 2 n − 1 = | ( x 3 − e 1 ) 2 n − 1 − e 2 | 2 n − 1 (8)

Theorem 1: For the given moduli set, any integer X ≥ M / 2 if and only if

e 3 = 2 n − 2 n − 1 (9)

or

e 3 = 2 n − 2 n − 1 − 1 AND e 2 = 2 n − 2 n − 1 (10)

for any n > 1 .

Proof: If it can be shown that by substituting (9) and (10) into Equation (4) that, X ≥ ( 2 n + 1 ) ( 2 2 n − 1 − 2 n − 1 ) then, it implies X ≥ M / 2 .

Assume (9) is true, then

X = e 1 + ( 2 n + 1 ) e 2 + ( 2 n − 2 n − 1 ) 2 n ( 2 n + 1 ) = e 1 + ( 2 n + 1 ) [ e 2 + 2 2 n − 2 2 n − 1 ] > ( 2 n + 1 ) ( 2 2 n − 1 − 2 n − 1 ) , ∀ n > 1

Also, assume (10) is true, then

X ≥ e 1 + ( 2 n − 2 n − 1 ) ( 2 n + 1 ) + ( 2 n − 2 n − 1 − 1 ) ( 2 2 n + 2 n ) = e 1 + ( 2 n + 1 ) [ 2 2 n − 2 2 n − 1 − 2 n − 1 ] ≥ ( 2 n + 1 ) ( 2 2 n − 1 − 2 n − 1 ) , ∀ n > 1 ∎

Thus, from (9) and (10), it is possible to determine the sign of an RNS number X; whether X ≥ M / 2 (for a negative number) or X < M / 2 (for a positive number).

The proposed method uses comparison by computing the MRDs of each of the addends to determine which half of the RNS range it belongs rather than performing a full reverse conversion. To detect overflow during addition of two addends X and Y based on the moduli set { 2 n − 1 , 2 n , 2 n + 1 } , a single bit that indicates the sign of that addend is defined. Now, based on this bit, three cases will then be considered:

1) Overflow will definitely occur if both of the addends are equal to or greater than half of the dynamic range (M/2).

2) Overflow will not occur if both of the addends are less than M/2.

3) Overflow may or may not occur if only one of the addends is equal or greater than M/2 and will require further processing to determine whether overflow will occur or not.

Let the magnitude evaluation of the addends ( X , Y ) be represented by β , such that if β = 1 or β = 0 represents a positive number or a negative number respectively as shown in Equation (11). The evaluation of the undetermined case in (3) is also represented by a single bit λ in (12).

β = { 1 ; e 3 = 2 n − 2 n − 1 1 ; e 3 = 2 n − 2 n − 1 − 1 AND e 2 = 2 n − 2 n − 1 0 ; otherwise (11)

and,

λ = { 1 ; x 1 + y 1 ≥ 2 n + 1 0 ; otherwise (12)

The proposed method will then detect overflow as follows:

o v e r f l o w = { 0 ; β X + β Y = 0 1 ; β X ⋅ β Y = 1 λ ; β X ⊕ β Y = 1 (13)

where ( + , ⋅ , ⊕ ) refer to the logical operations (OR, AND, XOR), respectively. For clarity, “1” means overflow occurs whilst “0” means no overflow.

Correction UnitLet Z be the sum of the two addends. By substituting the individual MRDs for both addends (X and Y), Z can be obtained as follows;

Z = X + Y = [ e 1 ( X ) + e 2 ( X ) m 1 + e 3 ( X ) m 1 m 2 ] + [ e 1 ( Y ) + e 2 ( Y ) m 1 + e 3 ( Y ) m 1 m 2 ] = ( e 1 ( X ) + e 1 ( Y ) ) + ( e 2 ( X ) + e 2 ( Y ) ) m 1 + ( e 3 ( X ) + e 3 ( Y ) ) m 1 m 2

by letting ψ i = e i ( X ) + e i ( Y ) , we shall have

Z = ψ 1 + ψ 2 m 1 + ψ m 1 m 2 (14)

Thus by adding the individual MRDs of the two addends, we obtain the sum Z according to (1) without having to compute separately for its MRDs. The value of Z obtained from (14) is the correct result of the addition whether overflow occurs or not. In case of overflow occurrence, the redundant modulus is employed by shifting M one bit to the left in order to accommodate the value.

From Equation (8), the MRD’s e 1 , e 2 and e 3 can be represented in binary as;

e 1 = e 1 , n e 1 , n − 1 ⋯ e 1 , 1 e 1 , 0 ︸ n + 1 (15)

e 2 = e 2 , n − 1 e 2 , n − 2 ⋯ e 2 , 1 e 2 , 0 ︸ n (16)

e 3 = e 3 , n − 1 e 3 , n − 2 ⋯ e 3 , 1 e 3 , 0 ︸ n (17)

Equations (15) to (17) can further be simplified as follows;

e 1 = x 1 = x 1 , n x 1 , n − 1 ⋯ x 1 , 1 x 1 , 0 ︸ n + 1 (18)

e 2 = | x 2 − x 1 | 2 n = | x 2 + t 1 | 2 n = | x 2 , n − 1 x 2 , n − 2 ⋯ x 2 , 1 x 2 , 0 ︸ n + t 1 , n − 1 t 1 , n − 2 ⋯ t 1 , 1 t 1 , 0 ︸ n | 2 n = e 2 , n − 1 e 2 , n − 2 ⋯ e 2 , 1 e 2 , 0 ︸ n n (19)

where,

t 1 = | − x 1 | 2 n = | − ( x 1 , n x 1 , n − 1 ⋯ x 1 , 1 x 1 , 0 ︸ n + 1 ) | 2 n = | − ( x 1 , n − 1 x 1 , n − 2 ⋯ x 1 , 1 x 1 , 0 ︸ n ) | 2 n = | x ¯ 1 , n − 1 x ¯ 1 , n − 2 ⋯ x ¯ 1 , 1 x ¯ 1 , 0 ︸ n | 2 n (20)

and

e 3 = | 2 n − 1 x 3 − 2 n − 1 e 1 − e 2 | 2 n − 1 = | t 2 + t 3 + t 4 | 2 n − 1 = | t 2 , n − 1 ⋯ t 2 , 1 t 2 , 0 ︸ n + t 3 , n − 1 ⋯ t 3 , 1 t 3 , 0 ︸ n + t 4 , n − 1 ⋯ t 4 , 1 t 4 , 0 ︸ n | 2 n − 1 = e 3 , n − 1 e 3 , n − 2 ⋯ e 3 , 1 e 3 , 0 ︸ n (21)

where

t 2 = | 2 n − 1 x 3 | 2 n − 1 = | 2 n − 1 ( x 3 , n − 1 x 3 , n − 2 ⋯ x 3 , 1 x 3 , 0 ) ︸ n | 2 n − 1 = x 3 , 0 x 3 , n − 1 ⋯ x 3 , 2 x 3 , 1 ︸ n (22)

t 3 = | − 2 n − 1 x 1 | 2 n − 1 = | − 2 n − 1 ( x 1 , n x 1 , n − 1 ⋯ x 1 , 1 x 1 , 0 ) ︸ n + 1 | 2 n − 1 = | − 2 n − 1 ( x 1 , n × 2 n + x 1 , n − 1 ⋯ x 1 , 1 x 1 , 0 ︸ n ) | 2 n − 1 (23)

Since, x 1 is a number that is smaller than 2 n + 1 , two cases are considered for x 1 . First, when x 1 is smaller than 2 n , and second, when x 1 is equal to 2 n [

t 31 = | − 2 n − 1 ( x 1 , n − 1 x 1 , n − 2 ⋯ x 1 , 1 x 1 , 0 ) ︸ n | 2 n − 1 = x ¯ 1 , 0 x ¯ 1 , n − 1 ⋯ x ¯ 1 , 2 x ¯ 1 , 1 ︸ n (24)

Else if x 1 , n = 1 , the following binary vector can be obtained as

t 32 = | − 2 n − 1 × 2 n ( 00 ⋯ 0 ︸ n − 1 x 1 , n ) | 2 n − 1 = 0 11 ⋯ 1 ︸ n − 1 (25)

Therefore, t 3 is calculated as

t 3 = { t 31 , if x 1 , n = 0 t 32 , if x 1 , n = 1 (26)

And finally,

t 4 = | − e 2 | 2 n − 1 = | − ( e 2 , n − 1 e 2 , n − 2 ⋯ e 2 , 1 e 2 , 0 ) ︸ n | 2 n − 1 = e ¯ 2 , n − 1 e ¯ 2 , n − 2 ⋯ e ¯ 2 , 1 e ¯ 2 , 0 ︸ n (27)

Let γ and ω represent the MRDs of the two integers X and Y respectively. Thus from equations (19) to (21), we have

ψ i = γ i + ω i (28)

which implies

ψ 1 = γ 1 + ω 1 = γ 1 , n γ 1 , n − 1 ⋯ γ 1 , 0 ︸ n + 1 + ω 1 , n ω 1 , n − 1 ⋯ ω 1 , 0 ︷ n + 1 = ψ 1 , n ψ 1 , n − 1 ⋯ ψ 1 , 0 (29)

ψ 2 = γ 2 + ω 2 = γ 2 , n − 1 γ 2 , n − 2 ⋯ γ 2 , 0 ︸ n + 1 + ω 2 , n − 1 ⋯ ω 2 , 0 ︷ n + 1 = ψ 2 , n − 1 ψ 2 , n − 2 ⋯ ψ 2 , 0 (30)

finally,

ψ 3 = γ 3 + ω 3 = γ 3 , n − 1 γ 3 , n − 2 ⋯ γ 3 , 0 ︸ n + 1 + ω 3 , n − 1 ⋯ ω 3 , 0 ︷ n + 1 = ψ 3 , n − 1 ψ 3 , n − 2 ⋯ ψ 3 , 0 (31)

and so, Z is implemented as;

Z = z 1 + z 3 + z 4 = 0 ⋯ 0 ︷ 2 n z 1 , n ⋯ z 1 , 0 ︸ n + 1 + 0 z 3 , 3 n − 1 ⋯ z 3 , 0 ︸ 3 n + 0 ⋯ 0 ︷ n + 1 z 4 , 2 n − 1 ⋯ z 4 , 0 ︸ 2 n ︸ 3 n + 1 (32)

where,

z 1 = ψ 1 (33)

z 3 = z 2 + 2 2 n ψ 3 = ψ 3 , n − 1 ⋯ ψ 3 , 0 ︸ n 00 ⋯ 0 ︷ 2 n ⋉ ⋊ z 2 , 2 n − 1 ⋯ z 2 , 0 ︸ 2 n = z 3 , 3 n − 1 z 3 , 3 n − 2 ⋯ z 3 , 1 z 3 , 0 (34)

z 2 = 2 n ψ 2 + ψ 2 = ψ 2 , n − 1 ⋯ ψ 2 , 0 ︸ n 00 ⋯ 0 ︷ n ⋉ ⋊ ψ 2 , n − 1 ⋯ ψ 2 , 0 ︸ n = z 2 , 2 n − 1 z 2 , 2 n − 2 ⋯ z 2 , 1 z 2 , 0 (35)

and,

z 4 = 2 n ψ 3 = ψ 3 , n − 1 ⋯ ψ 3 , 1 ψ 3 , 0 ︸ n 00 ⋯ 0 ︷ n = z 4 , 2 n − 1 z 4 , 2 n − 2 ⋯ z 4 , 1 z 4 , 0 (36)

The hardware realization of the proposed scheme is divided into four parts as shown in Figures 1-4. First is the Partial Conversion Part (PCP) shown in

Second, is the Magnitude Evaluation Part (MEP) shown in

Lastly, in

The area (A) and time (D) requirements of the proposed scheme are estimated based on the unit-gate model as used in [

( 2 n ) : A = 5 n + ( 3 2 ) n log 2 n ,

D = 2 log 2 n + 3

( 2 n − 1 ) : A = 12 n + 3 n ( log 2 n − 1 ) ,

D = 2 log 2 n + 3

Therefore, the hardware requirements of the scheme are as follows:

A P C P = A A D D 1 + A M U X + A A D D 2 + A A D D 3 = 23 n + ( 15 2 ) log 2 n + 3

A M E P = 2 ( A A N D ) = 2

A O D P = 2 ( A A N D ) = 2

A O C P = A A D D 4 + A A D D 5 + A A D D 6 = 63 n + 14

The estimated delay of the scheme will be as follows:

D P C P = D A D D 1 + D A D D 2 + D A D D 3 = 4 log 2 n + 5

A M E P = 2 ( A A N D ) = 2

A O D P = 2 ( A A N D ) = 2

D O C P = D A D D 4 + A A D D 7 + A A D D 8 = 9 g a t e s

Now, in order to make an effective comparison, the proposed scheme is divided into two: Proposed Scheme I for when the OCP is not included in the comparison and Proposed Scheme II for the OCP being included in the comparison. The delay of the OCP overrides the delay of the delays of the MEP and the ODP if Proposed Scheme II is consider since they will all be computed in parallel and the critical path in that case will be dictated by the OCP. The area for the PCP and the MEP is double for two numbers X and Y but this is not the case for the delay of the two numbers since they are computed in parallel. Thus, the total area and delay of the proposed schemes are:

A T O T A L ( I ) = 2 A P C P + 2 A M E P + A O D P = 46 n + 15 log 2 n + 10

D T O T A L ( I ) = D P C P + D M E P = 4 log 2 n + 7

and,

A T O T A L ( I I ) = 2 A P C P + 2 A M E P + A O D P + A O C P = 109 n + 15 log 2 n + 24

D T O T A L ( I I ) = D P C P + D O C P = 4 log 2 n + 16

This subsection presents numerical illustrations of the proposed scheme.

Checking overflow in the sum of 49 and 21 using RNS moduli set {3, 4, 5}

X = 49 = ( 4 , 1 , 1 ) R N S 〈 5 | 4 | 3 〉 = ( 100 , 01 , 01 ) R N S 〈 101 | 100 | 11 〉

Y = 21 = ( 1 , 1 , 0 ) R N S 〈 5 | 4 | 3 〉 = ( 001 , 01 , 00 ) R N S 〈 101 | 100 | 11 〉

Z = ( ( 100 , 01 , 01 ) + ( 001 , 01 , 00 ) ) R N S 〈 101 | 100 | 11 〉 = ( 000 , 10 , 01 ) R N S 〈 101 | 100 | 11 〉

A reverse conversion of ( 000 , 10 , 01 ) R N S 〈 101 | 100 | 11 〉 will result in the decimal number 10. Whilst the sum of the decimal numbers 49 and 21 is 70 which is obvious of overflow occurring.

Checking for RNS overflow using the proposed technique

e 2 ( 49 ) = | 01 − 100 | 100 = 001

e 3 ( 49 ) = | ( 01 − 01 ) ( 10 ) − 01 | 11 = | − 01 | 11 = 10 = 2 2 − 2

which implies, β ( 49 ) = 1 from (11).

Also,

e 2 ( 21 ) = | 01 + | − 001 | 100 | 100 = | 01 + 11 | 100 = 000

e 3 ( 21 ) = | ( 11 − 01 ) ( 10 ) − 11 | 11 = | 100 − 11 | 11 = 01 = 2 2 − 3

But e 2 ( 21 ) = 000 , which implies β ( 21 ) = 0 from (11).

Therefore, from (13) o v e r f l o w = λ and needs further processing.

Since e 3 ( 49 ) + e 3 ( 21 ) = 10 + 01 = 11 > 2 2 − 2 , the scheme detects overflow occurring after processing.

Correction unit

Z = ( 100 + 001 ) + ( 01 + 00 ) ( 101 ) + ( 10 + 01 ) ( 101 ) ( 100 ) = 1000110 = ( 70 ) d e c i m a l

Checking overflow in the sum of 10 and 11 using RNS moduli set {3, 4, 5}

X = 49 = ( 4 , 1 , 1 ) R N S 〈 5 | 4 | 3 〉 = ( 100 , 01 , 01 ) R N S 〈 101 | 100 | 11 〉

Y = 11 = ( 1 , 3 , 2 ) R N S 〈 5 | 4 | 3 〉 = ( 001 , 11 , 10 ) R N S 〈 101 | 100 | 11 〉

Z = ( ( 000 , 10 , 01 ) + ( 001 , 11 , 10 ) ) R N S 〈 101 | 100 | 11 〉 = ( 001 , 01 , 00 ) R N S 〈 101 | 100 | 11 〉

RNS to decimal conversion of ( 001 , 11 , 10 ) R N S 〈 101 | 100 | 11 〉 will result in the decimal number 21, which is correct result of 10 + 11.

Checking for RNS overflow using the proposed algorithm

e 2 ( 10 ) = | 10 − 000 | 100 = 10 = 2 2 − 2

e 3 ( 10 ) = | ( 01 − 000 ) ( 10 ) − 10 | 11 = | 10 − 10 | 11 = 00 < 2 2 − 3

which implies, β ( 10 ) = 0 since e 3 ( 10 ) = 00 < 2 2 − 3 , from (11).

Also,

e 2 ( 11 ) = | 11 + | − 001 | 100 | 100 = | 11 + 11 | 100 = 10 = 2 2 − 2

e 3 ( 11 ) = | ( 10 − 001 ) ( 10 ) − 10 | 11 = | 10 − 10 | 11 = 00 < 2 2 − 3

this implies, β ( 11 ) = 0 since e 3 ( 10 ) = 00 < 2 2 − 3 , from (11).

Thus, from (13) o v e r f l o w = 0 , which implies no overflow has occurred according to the proposed scheme after processing.

Correction unit

Z = ( 000 + 001 ) + ( 10 + 10 ) ( 101 ) + ( 00 + 00 ) ( 101 ) ( 100 ) = 010101 = ( 21 ) d e c i m a l

The performance of the proposed scheme is compared to schemes in [

As shown in

Scheme | Area | Delay |
---|---|---|

[ | 76 n + ( 33 / 2 ) n log 2 n | 6 log 2 n + 23 |

[ | 37 n + 18 | 16 n + log 2 n + 13 |

Proposed I | 46 n + 15 log 2 n + 10 | 4 log 2 n + 7 |

Proposed II_{ } | 109 n + 15 log 2 n + 24 | 4 log 2 n + 16 |

and faster than the scheme by [

Clearly, Proposed Scheme I completely outperforms the similar state-of-the-art scheme by [

From

n | AREA | DELAY | ||||||
---|---|---|---|---|---|---|---|---|

[ | [ | Proposed I | Proposed II | [ | [ | Proposed I | Proposed II | |

1 | 76 | 57 | 56 | 133 | 23 | 29 | 7 | 16 |

2 | 185 | 96 | 117 | 257 | 29 | 46 | 11 | 20 |

4 | 436 | 174 | 224 | 490 | 35 | 79 | 15 | 24 |

8 | 1004 | 330 | 423 | 941 | 41 | 144 | 19 | 28 |

16 | 2272 | 642 | 806 | 1828 | 47 | 273 | 23 | 32 |

32 | 5072 | 1266 | 1557 | 3587 | 53 | 530 | 27 | 36 |

64 | 11,200 | 2514 | 3044 | 7090 | 59 | 1043 | 31 | 40 |

128 | 24,512 | 5010 | 6003 | 14,081 | 65 | 2068 | 35 | 44 |

256 | 53,248 | 10,002 | 11,906 | 28,048 | 71 | 4117 | 39 | 48 |

512 | 114,944 | 19,986 | 23,697 | 55,967 | 77 | 8214 | 43 | 52 |

Total | 212,949 | 40,077 | 47,833 | 112,422 | 500 | 16,543 | 250 | 340 |

percentage difference shows that Proposed I is more efficient. It is clear from the graphs that in terms of delay, the scheme in [

Detecting overflow in RNS arithmetic computations is very important but can be difficult, more so, if it has to be corrected. In this paper, an ingenious technique of detecting overflow by use of the MRC method through magnitude evaluation as well correcting the overflow when it occurs was presented. This technique did not require full reverse conversion but used the MRDs to evaluate the sign of a number to detect the occurrence of overflow. With this technique, the correct value of the sum of two numbers is guaranteed whether overflow occurred or not. The scheme has been demonstrated theoretically to be very fast than similar-state-of-the-art scheme but required a little more hardware resources. However, the Proposed Scheme I, which is the one without the correction component completely outperformed the scheme in [

The authors declare no conflicts of interest regarding the publication of this paper.

Agbedemnab, P.A., Akobre, S. and Bankas, E.K. (2018) An Efficient Overflow Detection and Correction Scheme in RNS Addition through Magnitude Evaluation. Journal of Computer and Communications, 6, 15-29. https://doi.org/10.4236/jcc.2018.610002