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A theoretical study of a conventional boost converter is presented. Based on the real behavior of the components, two models of the boost converter are introduced: one dealing only with losses through inductor and capacitor and another taking into account switching losses in addition to resistive ones. From these two models, the detailed analytical expressions of both voltage gain factor and conversion efficiency are established taking into account the losses through parasitic resistances and switching losses. The behavior of the converter is then analyzed for each model by simulation for the voltage gain factor and the conversion efficiency.

Actually, the demand for clean energy sources is actively growing leading to the development of new or alternative energy technologies. These alternative energy technologies are essentially the renewable ones. The most promising renewable energy sources are wind energy, photovoltaic (PV) cells, and fuel cells (FC) [

Many high step-up DC-DC converters have been designed [

The conventional boost converter has many disadvantages like high voltage stress across the switching device and reverse recovery problem of output diode. It is also well know that its performance is limited due to higher on state resistance leading to more conduction losses in the switch, losses in the inductor series resistance and the ESR of the output capacitor [

These disadvantages are the major limitation of the use of that type of converter. Many works [

The studied converter is presented in

v L = L d i L d t = { V i n 0 < t < α T V i n − V 0 α T < t < T (1)

V 0 = V i n ( 1 − α ) (2)

with α being the steady state duty cycle and T the switching period.

When taking into account resistive losses through inductor and capacitor, the boost converter can be presented as shown in

P I = P 0 + P r L + P r C (3)

P_{I}, P_{O}, P r L , P r C are respectively the input power, the output power, the power losses through the inductor series resistance r_{L} and the power losses through the capacitor series resistance r_{C}. Expressing the different terms in Equation (3), see Appendix, Equation (3) can be rewritten in the form:

V i n ∗ V 0 ( 1 − α ) = V 0 ∗ V 0 R + r L ∗ V 0 2 ( 1 − α ) 2 R 2 + r C ∗ α V 0 2 ( 1 − α ) 2 R 2 (4)

R is the load resistor.

We can then derive the gain factor G as:

G = ( 1 − α ) R ( 1 − α ) R 2 + r L + r C α ( 1 − α ) (5)

The conversion efficiency h is defined by:

η = P 0 P 0 + P r L + P r C (6)

Replacing P_{O}, P r L , P r C by their respective expressions, the conversion efficiency becomes:

η = 1 1 + r L + r C α ( 1 − α ) R ( 1 − α ) 2 (7)

The model presented above (model 1) did not take into account the switching losses through active components (the Mosfet T and the diode D). The following model of the converter (

The power balance for the converter is:

P I = P 0 + P r L + P r C + P F E T + P D (8)

P_{FET}, P_{D} are respectively the power losses though the switch T and the diode D.

After some mathematical manipulations, we obtain (see Appendix):

V i n ∗ V 0 ( 1 − α ) = V 0 ∗ V 0 R + r L ∗ V 0 2 ( 1 − α ) 2 R 2 + r C ∗ α V 0 2 ( 1 − α ) R 2 + α r D S V 0 2 ( 1 − α ) R 2 + 1 2 f S C 0 V 0 2 + R F V 0 2 ( 1 − α ) R 2 + V F V 0 R (9)

f_{S}, r_{DSon}, C_{O} are respectively the transistor switching frequency, on resistance and output capacitance; r_{F} and V_{F} are the diode dynamic resistance and forward voltage.

The voltage gain factor G is then deduced as:

G = ( 1 − α ) R ( 1 − α ) R 2 + r L + r C α ( 1 − α ) + α r D S + 1 2 f S C 0 ( 1 − α ) 2 R 2 + V F V 0 ( 1 − α ) 2 R + R F ( 1 − α ) (10)

For the conversion efficiency, we have:

η = P 0 P 0 + P r L + P r C + P F E T + P D (11)

This leads to:

η = 1 1 + r L + α r D S R ( 1 − α ) 2 + R F + r C α R ( 1 − α ) 2 + V F V 0 + 1 2 f S C 0 R (12)

Based on the above mathematical formulation, simulations were performed by

varying duty cycle, series resistances, and choosing different transistors and diodes parameters. This is done for the two models and the effects of the series resistances are pointed out, as well as transistor and diode losses.

Define We present in _{L} considering small capacitor series resistance r_{C} (_{C} (

These figures show that voltage gain factor first increase until a certain duty cycle α_{0} value from which it began decreasing. In fact, when the duty cycle is increasing the losses in the series resistance of the inductor also increase to a threshold from which the losses are so important that the voltage gain factor begin decreasing for duty cycle approaching unity. We can see that this threshold depend directly on the series resistance value r_{L}. For low r_{L} the threshold is reached very close to duty cycle equal to unity but for increasing r_{L} the threshold is reached far from duty cycle equal to unity. This means that the maximum voltage gain factor (corresponding to a duty cycle α_{0}) is shifted left as r_{L} increases. As losses in the inductor increase, the voltage gain factor decrease very rapidly. This means that in practical design the value of r_{L} must be absolutely know otherwise the output voltage could not be guaranteed. _{C} values and high r_{C} values.

We plotted in _{C} considering small r_{L} (_{L} (

These two figures illustrate very well the above situation; for low r_{L} value as for high r_{L} value, the effect of the capacitor series resistance is very negligible on the voltage gain factor. That is, the effect of the capacitor series resistance could be neglected in a first approach in a practical design contrary to the inductor series resistance._{ }

Taking into account inductor’s series resistance could lead up to about 54% lower value of the voltage gain factor than that of ideal calculation (r_{L} = 0); for the case of r_{C}, the gain factor is only up to about 8% lower than ideal calculation (r_{C} = 0). If the output voltage ripple must be kept as low as possible, then the capacitor resistance should be very low, typically about 10 mΩ (example for X5R/X7R capacitors). Given that inductor losses also depend on operating frequency the selected inductor must have high quality factor value, typically before quality turning point.

The effect of the output diode is related to its forward voltage V_{F}; this forward voltage has to be as low as possible with also a low dynamic resistance value. This goal can be reached by choosing an appropriate Schottky diode.

For a given operating frequency and a set of inductor, capacitor and diode, the voltage gain factor only depend on the switching transistor characteristics.

We can see that the major problem comes from the r_{DSon} resistance value for a given operating frequency: the r_{DSon} value dictate the choice of the switching transistor when power-rating conditions are satisfied. It can also be noted that the quality of inductor plays a role only when r_{DSon} is low (nearly 50% decrease for a poor quality inductor); indeed, for higher r_{DSon} values the losses in the transistor prevail on those from the inductor. When r_{DSon} decrease, the losses through the transistor become negligible and the inductor losses prevail.

_{L} values considering small r_{C} (_{C} (

This figure shows that as the duty cycle increases, the conversion decrease and this decrease is very marked for duty cycles close to unity if the series resistance r_{L} of the inductor is small. When r_{L} is high, the losses in the inductor prevail as duty cycle increase leading to the observed decrease of the conversion efficiency.

It can be noted that the effect of r_{L} is very important for both low and high capacitor’s series resistance. Taking into account r_{L} could lead to an efficiency difference up to about 40% compared to unity (ideal conversion efficiency).

In _{C} values considering small r_{L} (_{L} (

As observed before (

With both

We now present in

_{DSon} is a very important parameter as noted before in _{DSon} the conversion efficiency decrease very markedly as the duty cycle increase. This decrease can reach 20% or more in the conversion efficiency depending on the operating duty cycle. This point out the importance of

the choice of the switching transistor. The good transistor should then have and r_{DSon} value as low as possible and in that case inductor losses are the main source of losses. The capacitance of the transistor is also a limiting factor at high frequencies.

We have presented in this paper a detailed theoretical study of a conventional boost converter. We have taken into account the real behavior of the passive and active component of the boost converter and we analyzed its voltage gain factor and conversion efficiency. It has been showed that inductor series resistance and transistor r_{DSon} resistance play the most important role leading to a decrease to up to 50% in the voltage gain factor. We also showed that it is not recommended to use duty cycle close to unity because losses effects are most important there with a markedly decrease of both voltage gain factor and conversion efficiency.

The effect of the capacitor series resistance is negligible for the voltage gain factor (less than 8%) and conversion efficiency; however, the designer must keep in mind that the series resistance of the capacitor directly affect the output ripple voltage and the control loop stability. The last parameter is the switching transistor r_{DSo}_{n} that must be as low as possible as the conversion efficiency of the converter will decrease markedly as duty cycle increase (up to 20%).

Despite its low voltage gain factor, a well-designed conventional boost converter can reach the fixed goal with the advantage of a simpler control loop leading to a cost effective and more robust design.

The authors declare no conflicts of interest regarding the publication of this paper.

Honadia, P.A.A., Barro, F.I. and Sané, M. (2018) Performance Analysis of a Boost Converter with Components Losses. Energy and Power Engineering, 10, 399-413. https://doi.org/10.4236/epe.2018.109025

When the switch S is on, we have:

v L = V i n = L d i L d t (A.1)

Integrating this equation give rise to the current flowing through the coil L:

i L ( t ) = I L m + V I L t (A.2)

with I_{Lm} being the minimum of i_{L}.

When T is off, the voltage across L can be written as:

v L = V I − V 0 = L d i L d t (A.3)

This above equation give rise to i_{L} in the form:

i L ( t ) = I L M + V I − V 0 L t (A.4)

with now I_{LM} being the maximum of i_{L}.

I_{LM} and I_{Lm} are reached respectively at the switching on and off of S and are related by:

I L m = I L M + V I − V 0 L ( T − τ )

I L M = I L m + V I L τ

with T being the switching period, α the duty cycle and τ = α T . Combining these two equations, we obtain the output voltage V 0 as (2):

V 0 = V i n ( 1 − α )

The power dissipated through r_{L} is:

P r L = r L + I I S R 2 (A.5)

with

I I S R = I I = I 0 ( 1 − α ) (A.6)

The power dissipated through r_{C} is given by:

P r C = r C + I C r m s 2 (A.7)

with

I C r m s = 1 T ∫ 0 T i C 2 d t (A.8)

and

i C = { − I 0 0 < t < α T I I − I 0 α T < t < T (A.9)

replacing i_{C} by the above equation leads to:

I C r m s = I 0 α ( 1 − α ) (A.10)

The output current I_{O} is:

I 0 = V 0 R

The power dissipated in the switch can be written as:

P F E T = P r D S + 1 2 P S W (A.11)

where P r D S is the losses through the drain-source on resistance r_{DS} and P_{SW} the switching losses. We then have:

P r D S = r D S ∗ I S r m s 2 (A.12)

where

I S r m s = 1 T ∫ 0 T i S 2 d t (A.13)

and

i C = { I I = I 0 ( 1 − α ) 0 < t < α T 0 α T < t < T (A.14)

Inserting Equation (A.14) into Equation (A.13) we obtain:

I S r m s = I 0 α ( 1 − α ) (A.15)

The switching losses are given by:

P S W = f S C 0 V S M 2 = f S C 0 V 0 2 (A.16)

The total losses in the switch S are then:

P F E T = r D S I 0 2 α ( 1 − α ) 2 + 1 2 f S C 0 V 0 2 (A.17)

The power losses in the diode D is

P D = P R F + P V F (A.18)

where

P R F = R F ∗ I D r m s 2

and

I D r m s = 1 T ∫ 0 T i D 2 d t

with i_{D} being:

i D = { 0 0 < t < α T I I = I 0 ( 1 − α ) α T < t < T

These above equations lead to:

I D r m s = I 0 ( 1 − α )

and then:

P R F = R F I 0 2 ( 1 − α ) (A.19)

The last term in the power losses in the diode D is:

P V F = V F I D = V F I 0 (A.20)