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In this paper, the design of a proportional integral controller (PIC) plus fuzzy logic controller (FLC) for the negative output elementary super lift Luo converter (NOESLLC) operated in discontinuous conduction mode (DCM) is presented. In spite of the many benefits viz . the high voltage transfer gain, the high efficiency, and the reduced inductor current and the capacitor voltage ripples, it natured with non-minimum phase. This characteristic makes the control of NOESLLC cumbersome. Any attempt of direct controlling the output voltage may erupt to instability. To overcome this problem, indirect regulation of the output voltage based on the two-loop controller is devised. The savvy in the inductor current control improves the dynamic response of the output voltage. The FLC is designed for the outer (voltage) loop while the inner (current) loop is controlled by the PIC. For the developed ?19.6 V NOESLLC, the dynamic performances for different perturbations (line, load and component variations) are obtained for PIC plus FLC and compared with PIC plus PIC. The study of two cases is performed at various operating regions by developing the MATLAB/Simulink model.

The voltage lift (VL) technique is a relatively new technique to employ in dc-dc converter topologies. In the topologies discussed hitherto, the parasitic elements dissuade the output voltage and power transfer efficiency of dc-dc converters, while the VL technique can lead to improvement [

The negative output elementary super lift Luo converter (NOESLLC) is a one of the attractive dc-dc converter and possesses the features viz. high voltage transfer gain (in geometric progression), an excellent efficiency, a suppressed inductor/capacitor ripples [

A novel negative output converter (negative-output KY buck-boost converter) has been presented [

The introduced pulse adjustment technique is a digital control technique to control dc-dc converters loaded by constant power loads. This novel digital control treats converter as a digital system and regulates output voltage with the help of two predefined state variables. A genetic algorithm (GA) tuned proportional integral controller (PIC) has been devised for NOESLLC [

The power circuit of NOESLLC is shown in

In the

During 0 ≤ t ≤ dT, i_{L}_{1} increases with slope _{L}_{1} decreases with slope

The above Equation (2) can be simplified as

In the steady state condition, the average capacitor current is zero. Considering the current in C_{o} in

Using

Combining (3) and (5) becomes

Next, defining the voltage transfer gain

Therefore,

Solving the Equation (8), expresses the voltage transfer gain as follows.

The condition of DCM is expressed in (1). Substitution of (7) in (1) gives,

Substitution of (9) into (10) engraves as (11)

The Equation (11) is the condition for DCM in the NOESLLC. This equation can be verified from the variation ratio of inductor current in CCM.

where, ξ < 1 in the CCM and ξ > 1 in the DCM. Then the DCM condition is

The Equation (13) agrees with Equation (11)

where,

Equation (15) can be depicted graphically as shown in _{1} < d < d_{2}

corresponds to the DCM. But, if

The derivation of variation ratio of the capacitor voltages can be expressed as (16).

where,

Using the above model equations, the detailed design and specifications of NOESLLC circuit is obtained and recorded in

This section studies the DCM operation of NOESLLC with two different combinations of double controllers. The considered PIC plus PIC and PIC plus FLC controller combinations with the proposed scheme of control is illustrated in

Parameters name | Symbol | Value |
---|---|---|

Input voltage | V_{in} | 10 V |

Output voltage | V_{o} | −19.6 V |

Inductor | L_{1} | 45 µH |

Capacitors | C_{1}, C_{o} | 4.7 µF, 22 µF |

Nominal switching frequency | f | 100 kHz |

Load resistance | R | 416.16. |

Average input current | I_{in} | 0.11 A |

Efficiency | 82.5% | |

Average output current | I_{o} | −0.047 A |

Duty ratio | d | 0.2 |

D' | 0.21 | |

Peak to peak capacitor ripple | −0.01 V |

This section deals about the simulation study and results of NOESLLC in DCM using PIC plus FLC/PIC. The NOESLLC in DCM performance is verified at various conditions viz. start-up transient, line variation, load variation, and also circuit components variations. The MATLAB/SIMULINK simulation models are performed on the NOESLLC in DCM with specifications listed in

From the Figures 6(a)-(c), it is clearly focused that the output voltage of the NOESLLC in DCM has overshoots = −0.021 V, settling time of 0.0032 s, and steady state error around −0.12 V using PIC plus FLC, while the NOESLLC in DCM with PIC plus PIC has produced peak overshoots of −2.12 V and settling time of 6.22 ms during line disturbance region.

From the

resistance change 416.6 ohm to 516.6 ohm at time of 0.05 s with input voltage of 10 V. From the Figures 8(a)-(c), it is clearly focused that the output voltage of the NOESLLC in DCM overshoots = −0.018 V, settling time of 0.0038 s, and steady state error around −0.12 V using PIC plus FLC, while the NOESLLC in DCM with PIC plus PIC has produced peak overshoots of −0.385 V and settling time of 0.12 ms during load disturbance region.

The time domain performance analysis of NOESLLC in DCM using both controllers is listed in

In this article, the analysis, design, inductor current and output voltage regulation of

Results | Controllers | Start up Region | Line variations (10 V to 13 V and 10 V to 07 V) | Load variations (416.6 Ω to 316.6 Ω and 416.6 Ω to 516.6 Ω) | |||
---|---|---|---|---|---|---|---|

Maximum Overshoots (V) | Settling Time (ms) | Maximum Overshoots (V) | Settling Time (s) | Maximum Overshoots (V) | Settling Time (s) | ||

Simulation | PIC plus FLC | −0.018 | 0.0035 | −0.021 | 0.0032 | −0.02 | 0.0034 |

PIC plus PIC | −2.6 | 6.25 ms | −1.95 | 6.24 ms | −5.12 | 0.53 ms |

the NOESLLC operated in DCM using a variable frequency based PIC plus FLC/PIC have been successfully exhibited. The non-minimum phase behavior of the dc-dc converters results in the instable control system. In such cases the indirect regulation of the output voltage is helpful. The two-loop controller is triumph in controlling the system with improved dynamic performance. The developed PIC plus FLC regulates the output voltage of the −19.6 V NOESLLC for all possible perturbations (line, load and component variations). The merits of the designed controller are compared with PIC plus PIC using MATLAB/Simulink simulation study. There evidenced a drastic decease in peak overshoot and settling time of the start-up when PIC plus FLC is used. Similar improvement is also noticed in line and load variations.

Muthukaruppasamy, S. and Abudhahir, A. (2016) Indirect Output Voltage Control in Negative Output Elementary Super Lift Luo Converter Using PIC plus FLC in Discontinuous Conduction Mode. Circuits and Systems, 7, 3685-3704. http://dx.doi.org/10.4236/cs.2016.711310