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In this paper, an improved hybrid space vector pulse width modulation (HSVPWM) technique is proposed for IM (induction motor) drives. The basic principle involved in the proposed random pulse width modulation (RPWM) cuddled SVPWM is amalgamating the pre-calculated switching timings for various sections of hexagonal space vector boundary and the random selection of carrier between two triangular signals, in order to disband acoustic switching noise spectrum with improved fundamental component. The arbitrary selection between triangular carriers, which is decided by digital signal states (Low or High) of the linear feedback shift register (LFSR) based pseudo random binary sequence (PRBS) generator. The SVPWM offers a control degree of freedom in terms of positioning of vectors inside every sampling interval and hence it has six possible variants of the voltage vectors arrangements in each sector. The developed HSVPWM is thoroughly analyzed in using the MATLAB? based simulation for all SVPWM variants. From the simulation and experimental results viz. harmonic spectrum, harmonic spread factor (HSF), total harmonic distortion (THD) etc., and the superiority of the proposed scheme such as better utilization of DC bus and the randomization of the harmonic power are evidenced. For the practical implementation, Xilinx XC3S500E FPGA device has been used.

The main aim of any modulation technique employed in voltage source inverters (VSIs) is to obtain variable output having a maximum fundamental component with minimum distortion. In a sinusoidal pulse width modulation (SPWM), a sinusoidal reference signal at desired output frequency is compared with a triangular waveform to generate the required duty cycles. The drawback of this technique is that it generates a fundamental term with limited amplitude, a significant amount of undesired carrier frequency harmonics and increased switching losses [

Space vector pulse width modulation (SVPWM) is a method of pre-calculation of switching the timing instants for various sections of target output which has options in terms of positioning the active vectors inside every sampling interval [

Random PWM (RPWM) methods have attracted attention from 1987 as a solution to the above problem. In a typical RPWM, the duty cycle is computed by comparing the sinusoidal reference wave with the randomly composed triangular carrier using two triangular waves each of the same has fixed frequency, but of opposite the phase [

A discontinuous PWM method has exhibited better performance with higher modulation range which is mandatory for high power applications [

Space vector pulse width modulation is a digital PWM method, in which, the duty cycles of gating pulses are pre-calculated for every sections of target output cycle [

where, T_{1}, T_{2} and T_{0} are computed switching instants for the lagging, leading and zero switching vectors, “n” is the sector number (Sectors 1 to 6), T_{z} is sampling time, f_{c} is switching frequency and α is the instantaneous phase angle of V_{ref} (0˚ ≤ α ≤ 360˚). The freedom in space vector modulation (SVM) is the choice of formulating the switching patterns [

The choice of the zero vectors―(i) contribution of V_{7} (111) or V_{0} (000) or both for pattern formation, (ii) sequencing of the vectors (clockwise reference vector rotation and anti-clockwise reference vector rotation) and arrangement of leading, lagging and null vectors, (iii) and splitting of the duty cycles of the vectors without introducing additional commutations. Based on the above clues, six patterns are formulated. It is worth noting that according to the theory of SVM, the reference vector is contributed just by active vectors, not by null vectors. The involvement of null vectors may facilitate the digital implementation and also helps in solving few practical circuit complications. Avoidance of the null vectors may create a problem in inverter bridges that use isolation circuits such as bootstrap. The reason is that the lower leg of the inverter is switched on or off for extended periods of time. Pattern I: An unique switching pattern is followed for each sector and can be summarized as V_{0} (000), V_{1} (100), V_{2} (110), V_{7} (111), V_{7} (111), V_{2} (110), V_{1} (100), V_{0} (000) for sector 1. Where, V_{1} and V_{2} (V_{1} + 60˚) are the forming (contributing) vectors in the sector 1. For the consecutive sector (Sector 2) the respective contributing vectors, V_{2} and V_{3} are used in place of V_{1} and V_{2}. Pattern II: This pattern is similar to pattern I, but only the null vector V_{0} is involved in all sectors along with two active vectors. Pattern III: This pattern is similar to pattern II, but the null vector V7 is engaged instead of V0. Pattern IV: This pattern has two different vector sequences for odd numbered (1, 3, 5) and even numbered (2, 4, 6) sectors. With the contribution of vectors, odd sectors and even sectors use V_{7} and V_{0} as null vectors respectively. Pattern V: In this pattern, the null vector assignment is swapped while comparing to the pattern IV. That is, V_{0} is considered for odd sectors and V_{7} for even sectors. Pattern VI: This pattern is similar to pattern II, but the assignment of active vectors V_{1} and V_{2} are swapped.

The PWM techniques can be broadly classified as deterministic PWM schemes and non-deterministic PWM schemes. The conventional PWM schemes viz. SPWM, SVPWM, selective harmonic elimination PWM (SHEPWM) etc. are examples for deterministic PWM schemes. The RPWM schemes are non-deterministic PWM schemes. The deterministic PWM schemes are operated at constant switching frequency in a modern drive system [_{c} (say 1.5 kHz), the harmonic spectrum possesses the clustered harmonics at its multiples (2f_{c}, 4f_{c}, 6f_{c} etc.) as shown in

The acoustic noise emitted by the motor is very annoying under this condition since the majority harmonics comes within the audible range (20 Hz - 20 kHz). These clustered harmonic spectra will produce acoustic noise, electromagnetic interference (EMI), mechanical vibration and hence paves a possibility of physical damage to the rotor. The best way to reduce the audible switching noise is radiated from the induction motor is to increase the PWM switching frequency up to 18 kHz. Such a method can solve the noise problem but increases the switching loss of the inverter [

All the previous attempts in changing the reference wave were towards the fundamental enhancement and THD reduction. The reformation of harmonic spectrum like spreading the harmonic power must be done through carrier modification/randomization. The recent solution for above said problems is RPWM, where switching frequency is selected within the audible range (hence reduced switching losses) with an intelligent randomness so that no objectionable audio noise is produced.

An ingenious PWM schemes, which amalgamates the features of SVPWM and RPWM is the need of any modern ac drive system. Conceptually the SVM suggests six different references (analog equivalent) for the better most of THD and the enhanced fundamental. It does not offer any guidance on carrier selection and suggests the usage of conventional triangular carrier. Opportunely, the randomness addition in the RPWM is in carrier wave and restricted within the carrier cycle. This paves the way to amalgamate the random carrier with the SVPWM irrespective of the pattern preference.

The implementation accuracy of any computation intensive PWM largely depends on the implementation platform and the algorithm used. The proposed hybrid SVPWM (HSVPWM) adds both timing computation and carrier randomness to its complexity, and demands great care in implementation. The implementation of the HSVPWM is done with the help of an architecture as shown in

pulse generation block compares the references with the randomized carrier and generates the pulses for the six switches of VSI. In case the output is “1” then the winning triangle is +fc triangle otherwise the winning triangle is −fc triangle as shown in

In the carrier generation and selection block, normal triangular carrier (+fc) and inverted triangular carrier of same frequency (−fc) are given as input to the 2:1 multiplexer. Choice of triangle called winning triangle depends up on the output of the LFSR based 8 bit random bit generator. The pulse generation block compares the references with the randomized carrier and generates the pulses for the six switches of VSI. In case the output is

“1” then the winning triangle is +fc triangle otherwise the winning triangle is −fc triangle as shown in

A simulation study is carried out using MATLAB 7.9b software with ode23tb solver. Conventional simulation study for the kind of calculation involves understanding the various waveforms, harmonic study (fundamental and other harmonics) and THD along with spectrum. Another performance parameter harmonic spread factor is a simple quality indicator would be useful for evaluating the harmonic spread effect of the random PWM scheme. The factor is named as harmonic spread factor (HSF) and uses the concept of statistical deviation. The HSF [

where, “H_{j}” is amplitude of jth harmonics, “H_{0}” is average value of all “N − 1” harmonics. The HSF quantifies the harmonic spectra spread effect of any PWM scheme and it should be small. For ideal flat spectra of white noise, the HSF would be zero. A theoretical comparison of line to line voltage performance indices are presented in for dc bus voltage V_{dc} = 415 V, fundamental frequency f1 = 50 Hz and average switching frequency f_{c} = 1.5 kHz with the inverter feeding a 0.75 kW, 415 V, 50 Hz, three-phase squirrel cage induction motor. The switches are considered to be ideal. The simulation results of the harmonic spectra for pattern I of HSVPWM (M_{a} = 0.8) is given in

The performance parameters (fundamental voltage, THD and HSF) are carried out by using FFT window in MATLAB simulation tool with one cycle of line to line voltage.

M_{a} | SVPWM patterns | RPWM | HSVPWM patterns | ||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|

I | II | III | IV | V | VI | I | II | III | IV | V | VI | ||

Fundamental voltage | |||||||||||||

0.2 | 81.94 | 40.44 | 76.46 | 76.8 | 76.27 | 76.65 | 69.54 | 81.73 | 40.36 | 76.47 | 76.84 | 76.41 | 76.6 |

0.4 | 163.7 | 81.25 | 154.2 | 153.8 | 153.5 | 153.6 | 146.4 | 163.5 | 81.25 | 153.7 | 154 | 153.8 | 154 |

0.6 | 245.5 | 122 | 215.6 | 215.2 | 214.6 | 215.8 | 214.1 | 245.2 | 122.1 | 215.9 | 214 | 214.9 | 215.3 |

0.8 | 325.9 | 163.3 | 218.1 | 220.8 | 220 | 217.4 | 284.4 | 327.8 | 163.3 | 218.1 | 220.6 | 220.8 | 217.6 |

1 | 406.5 | 203 | 216 | 222.5 | 222.5 | 215.9 | 355.3 | 408.3 | 204.1 | 216.4 | 222.24 | 222.6 | 215.7 |

THD | |||||||||||||

0.2 | 234.47 | 351.2 | 244.44 | 244.17 | 244.74 | 243.85 | 258.62 | 235.0 | 351.8 | 244.64 | 244.26 | 244.45 | 244.27 |

0.4 | 144.24 | 236 | 155.79 | 156.19 | 156.61 | 156.4 | 161.6 | 149.4 | 236.3 | 156.29 | 156.14 | 156.39 | 155.94 |

0.6 | 106.85 | 182.97 | 119.4 | 119.65 | 120.06 | 119.62 | 122.25 | 107.0 | 183.1 | 119.42 | 119.84 | 119.7 | 119.73 |

0.8 | 77.73 | 149.58 | 117.35 | 114.49 | 114.9 | 117.75 | 91.79 | 77.37 | 149.7 | 217.43 | 114.63 | 114.69 | 117.79 |

1 | 52.84 | 125 | 118.83 | 112.8 | 112.8 | 119.25 | 70.18 | 52.72 | 125.9 | 118.89 | 112.94 | 113.01 | 119.27 |

M_{a} | SVPWM patterns | RPWM | HSVPWM patterns | ||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|

I | II | III | IV | V | VI | I | II | III | IV | V | VI | ||||

HSF | |||||||||||||||

0.2 | 9.12 | 11.09 | 9.30 | 8.90 | 8.90 | 9.27 | 9.52 | 8.79 | 9.46 | 7.06 | 7.36 | 7.31 | 7.01 | ||

0.4 | 6.09 | 9.06 | 6.16 | 5.99 | 6.00 | 6.18 | 5.93 | 5.68 | 6.98 | 4.53 | 4.77 | 4.78 | 4.50 | ||

0.6 | 4.38 | 7.19 | 4.92 | 4.77 | 4.79 | 4.93 | 4.34 | 3.99 | 5.47 | 3.62 | 3.74 | 3.76 | 3.64 | ||

0.8 | 3.12 | 5.95 | 4.83 | 4.59 | 4.60 | 4.85 | 3.10 | 2.70 | 4.39 | 3.59 | 3.60 | 3.66 | 3.66 | ||

1 | 2.07 | 5.08 | 4.89 | 4.53 | 4.54 | 4.91 | 2.15 | 1.65 | 3.83 | 3.70 | 3.57 | 3.68 | 3.81 | ||

in all the modulation indices are almost equal to SVPWM patterns. But amazingly the HSF of the HSVPWM patterns (except pattern II) are superimposed when compared to the existing SVPWM and RPWM schemes. For higher linear modulation indices (M_{a} = 0.8 to 1.0), HSVPWM pattern I has given a higher harmonic spreading effects(less HSF) when compared with the other HSVPWM patterns. But for lesser than 0.8 modulation indices the pattern I is less performing while comparing with the higher order HSVPWM patterns (3 to 6).

The superlative values of performance indices are underlined in

Fundamental improvement of HSVPWM 0.44% is more than the SVPWM and 28.44% more than the RPWM for modulation index 1.0. In HSVPWM, 0.23% of the THD has been decreased when compared with SVPWM and 24.88% decreased when compared with RPWM for the modulation index 1.0.

The recent developments in the field of VLSI made FPGAs as one of the major components in high performance processors especially in the area of power conversion utilities [

M_{a} | % of improvement HSVM (pattern I) over SVM(pattern I) | % of improvement HSVM (pattern I) over RPWM | ||||
---|---|---|---|---|---|---|

Fundamental | THD | HSF | Fundamental | THD | HSF | |

0.2 | −0.26% | -0.24% | 3.62% | 17.53% | 9.12% | 7.67% |

0.4 | −0.12% | -3.58% | 6.73% | 11.68% | 7.55% | 4.22% |

0.6 | −0.12% | -0.21% | 8.90% | 14.53% | 12.42% | 8.06% |

0.8 | 0.58% | 0.46% | 13.46% | 15.26% | 15.71% | 12.90% |

1 | 0.44% | 0.23% | 20.29% | 14.92% | 24.88% | 23.26% |

Dominating harmonics for M_{a} = 0.8 | |||||
---|---|---|---|---|---|

SVPWM(pattern I) | RPWM | HSVPWM(pattern I) | |||

D-H-O | magnitude (% of Fundamental) | D-H-O | magnitude (% of Fundamental) | D-H-O | magnitude (% of Fundamental) |

119 | 30.93 | 121 | 40.01 | 119 | 31.35 |

121 | 30.83 | 119 | 38.16 | 121 | 30.28 |

62 | 18.69 | 241 | 13.84 | 241 | 18.79 |

239 | 18.69 | 239 | 12.6 | 239 | 18.25 |

58 | 18.63 | 245 | 10.63 | 115 | 11.51 |

241 | 18.56 | 60 | 10.48 | 359 | 9.36 |

56 | 13.19 | 167 | 9.82 | 361 | 9.03 |

method and the synthesis results have been acquired from Xilinx project navigator tool. The XC3S500E-5fg320, 90 nm low cost FPGA device is used for real time exploitation. A 50 MHz board clock has been used for sequential circuit design. In this work, 16% of look up tables are utilized. 15% DSP based 18x18 multipliers are used for development of carrier and reference waves. A Xilinx power estimator tool is used to estimate the power analysis. In this scheme, dissipation of the static power is 78 mW and the Dynamic power is 32 mW. Total power dissipated by FPGA device is 110 mW. This power analysis has been taken for typical process with commercial grade, ambient temperature is 25˚C and Vccint voltage is 1.2 V.

To validate the analysis and simulations in the previous sections, a laboratory experimental setup has been assembled as shown in

In this paper, a hybrid Space Vector PWM switching patterns for three phase voltage source inverter is proposed. The main idea of the proposed PWM strategy is to combine the merits of both the SVPWM and RPWM. The HSVPWM is compared systematically with its counterparts SVPWM and RPWM. The results evidenced the success of the HSVPWM methods in term of improved fundamental component, reduced THD and minimal HSF. The strategy finds it suitability with the modern ac drives for noise free working. In addition, this method, blended successfully with FPGA, occupies less area and achieves low propagation delay with very less power dissipation. In future, more randomization can be performed by using 16 bit or 32 bit LFSRs.

P. Muthukumar,P. Melba Mary,S. Jeevananthan,1 1, (2016) An Improved Hybrid Space Vector PWM Technique for IM Drives. Circuits and Systems,07,2120-2131. doi: 10.4236/cs.2016.79184