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A new electronically-controllable lossless floating inductance (FI) circuit (without any matching condition) has been presented, which employs only one Voltage Differencing Current Conveyor (VDCC), one grounded capacitor and one grounded resistor. The main aim of the paper is to present a new floating inductance simulator using single active device with minimum passive components. The proposed floating inductance simulator can be electronically controllable by changing the bias current. The workability of the new presented FI circuit has been verified using SPICE simulation with TSMC CMOS 0.18 μm process parameters.

Although many circuits for the simulation of grounded and floating inductance using different active building blocks such as operational amplifiers [1-5], current conveyors [6-13], current feedback amplifiers [14,15], current differencing buffered amplifiers [16,17], current differencing transconductance amplifiers [18,19], operational transconductance amplifiers [20,21], operational mirrored amplifiers [

Therefore, the main objective of this paper is to propose a new circuit which employs one VDCC, one grounded capacitor and one grounded resistor to realize electronically-controllable lossless matchless FI circuit. The presented circuit has also the features like only two passive components (i.e. one grounded capacitor (as desired for IC implementation) and one grounded resistor) and low active and passive sensitivities. The validity of the presented new circuit has been verified using SPICE simulation with TSMC CMOS 0.18 μm process parameters.

The symbolic notation of recently proposed active building block, VDCC is shown in _{P} and W_{N }are output terminals. All of the terminals exhibit high impedance, except the X terminals [

The proposed FI circuit is shown in

A routine circuit analysis of the new FI circuit shown in

which shows that the circuit simulates a floating lossless electronically-controllable inductance with the inducbtance value given by

The proposed FI circuit consisting various non-ideal parasitics is shown in _{P}-terminal consisting of a resistance in parallel with capacitance, the parasitic impedance at the W_{N}- terminal consisting of a resistance in parallel with capacitance and the parasitic impedance at the Zterminal consisting of a resistance.

For the circuit shown in

where

The non-ideal equivalent circuit of FI of

Where and, ,

The various sensitivities of L_{FI }with respect to active and passive elements are:

Thus, all the passive and active sensitivities of FI circuit are low.

The workability of the proposed FI circuits are demonstrated by realizing (i) a band pass filter (BPF) (

The transfer function realized by the configuration shown in

From Equation (6), it is clear that centre frequency is tunable by R_{2}.

The performance of the proposed FI circuit was verified by SPICE simulations. The frequency response of the FI circuit was obtained by using CMOS-based VDCC [_{m} = 277.833 μA/V, R = 10 kΩ. From the frequency response of the simulated FI circuit (

The application circuits shown in Figures 5 and 6 were also been simulated using CMOS VDCCs. The component values used were for Figures 5: C_{1} = 0.01 nF, C_{2} = 0.02 nF, R_{1} = 10 kΩ, R_{2} = 3.6 kΩ, g_{m} = 277.833 μA/V and for _{S} = R_{L} = 1 KΩ, L_{1d} = 0.2437 mH (g_{m} = 277.833 μA/V, C_{1} = 0.01 nF, R_{1} = 6.77 kΩ), L_{2d} = 0.5884 mH (g_{m} = 277.833 μA/V, C_{2} = 0.01 nF, R_{1} = 16.225 kΩ), C_{1d} = 0.5884 nF, C_{2d} = 0.2437 nF (after appropriate frequency and impedance scaling). The VDCC were biased with ±0.9 volts D.C. power supplies with I_{B1} = 50 μA (for g_{m} = 277.833 μA/V). Figures 8 and 9 show the simulated band pass filter and 4^{th}-order Butterworth filter responses respectively. A comparison of proposed FI with other published floating inductor is shown in

Thus, the above simulation results confirm the validity of the applications of the proposed FI circuit.

A new electronically-controllable loss-less FI circuit without any matching condition has been proposed which employs one VDCC, one grounded capacitor and one grounded resistor. The proposed circuit offers the following advantageous features: 1) only two passive components i.e. one grounded capacitor (as desired for IC implementation) and one grounded resistor; 2) no matching condition; 3) fully electronically controllable (by changing bias currents); and 4) low active and passive sensitivities. The SPICE simulation results have confirmed the workability of the new proposed floating inductance circuit.