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This paper reports design of a CMOS optical receiver front-end using 0.18 μm technology. Design process is current associated with photodiode using trans-impedance amplifier (TIA) for wide bandwidth, high gain, low input referred noise and wide dynamic range. The Automated Gain Control (AGC) voltage is used to provide variable gain for multilevel signals. This design is simulated in 0.18 μm UMC technology for the performance analysis. The best simulation results are reported the maximum TIA gain of 67.26 dB? at 0 V AGC followed by a post amplifier gain of 86.70 dB?. The bandwidth range is 7.03 GHz to 11.5 GHz corresponding to 0 - 3 V AGC respectively. The input referred noise level value is 43.86 pA/√Hz up to 10 GHz frequency. In addition authors have obtained the common mode rejection ratio (CMRR) is 72.42 dB and rectified group delay is 144.48 ps. Verification of the design, reported results are compared with earlier published work and improvements obtained in the present results.

Optical receivers find applications in laptop computers, cellular phones, digital cameras, computer peripherals, personal digital assistants (PDAs), and many other consumer electronics equipped with a short-distance communication port. A commonly used topology is the transimpedance (TIA) amplifier, whose relative low input impedance and wide bandwidth is well suited for the application [

For open loop TIA the input resistance of this amplifier can be determined by [

whererds_1 = the drain to source resistance gm_1 = the device trans-conductance Rd = the drain resistance and gmb_1 = the back-gate trans-conductance due to the body effect For long channel devices operating in the saturation region, the value of rds is large and it can be reduced by this relation:

This is an important result because the bandwidth is independent of the trans-impedance gain set by RD. The unfortunate downside of open loop TIA is that the noise current produced by the load resistance RD and the bias transistor are directly referred to the input with a unity factor therefore closed loop TIA are more preferable because the feedback resistor can be increased independently to the supply voltage since no bias current flows through it. The trans-impedance gain of an ideal inverting voltage amplifier with a feedback resistor Rfb can be given as [

whereA = the open loop voltage gain of the amplifier.

Cpd = the photodiode capacitance.

If the voltages gain “A” of the amplifier is sufficiently high; the trans-impedance is approximately equal to Rfb in the amplifier’s pass band. Assuming that the dominant pole is at the input, the 3db bandwidth of this circuit will be given by the following expression as:

From Equation (4) it can be concluded that the bandwidth of the TIA is greater than that of a simple resistive network by a factor of A + 1. To reduce input referred noise current, TIA uses cascode noise from the resistor is directly referred to the input such that the mean squared input referred noise current spectral density is constant and given in equation

The group delay is defined as the negative of the derivative of the phase of the trans-impedance with respect to frequency [_{L}. The

A flat group delay means the amplifier has a linear phase response. A flat group delay is important because variations in the group delay with frequency can cause distortions in the output signal.

One of the issues to consider when comparing the two topologies common source and common gate is the effect of the Miller capacitance.

The gate to drain capacitance C_{GD}, known as the Miller capacitance, is connected between the input and output. Miller’s theorem allows this capacitance to be replaced with shunt capacitances at the input and output [_{1} and I_{2} must remain constant during the transformation.

The values of the shunt admittances can now be determined and are shown below.

This is an interesting result because as the gain is increased, the input capacitance of the amplifier is increased. This reduces the magnitude of the input pole and reduces the bandwidth of the TIA. This effect can be reduced by using the cascode configuration which minimizes the Miller effect by placing a common gate transistor in series with the common source transistor. A voltage gain stage was added after the trans-impedance stage [

_{6} and C1 is converted into the voltage forms using the trans-impedance amplifier. This converted voltage posses no distortion and expressed as the sinusoidal waves at the differential output which is further shifted its level to 3 V at the output of post amplifier.