Selective Filters and Tunable Sinusoid Oscillator Using a CDBA


The realization of some new selective filters using single current differencing buffered amplifier (CDBA) and few RC components is presented. The same topology provides lowpass (LP), bandpass (BP) and highpass (HP) characteristics with appropriate choice and location of the RC components in the circuit. Incorporation of a suitable feedback loop through a voltage buffer unity-gain cell yields a tunable sinusoid oscillator. Effects of the device port mismatch errors (ε) and parasitic z-node capacitance (Cz) of the CDBA element are shown to be insignificant and corresponding sensitivities are extremely low. Satisfactory experimental verifications of the filter quality (Q) and oscillator tuning range (500 KHz ≤ fo ≤ 5 MHz) are carried out.

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R. Nandi, P. Venkateswaran and S. Das, "Selective Filters and Tunable Sinusoid Oscillator Using a CDBA," Circuits and Systems, Vol. 4 No. 2, 2013, pp. 227-232. doi: 10.4236/cs.2013.42030.

1. Introduction

The CDBA element, introduced in the recent past as a versatile active building block [1], is now being widely used for various analog signal processing/conditioning and wave generation applications [1-10]. The element has various advantageous features [1], viz., improved bandwidth, fast settling time and high slew rate. The CDBA offers accurate unity port-transfer ratios when it is being configured by a pair of readily available current feedback amplifier (CFA-AD844 or OPA-2607 dual pack) device [4,7,8]; recently some improved models of CFA (OPA-695) are being made available with bandwidth (BW) of 1.4 GHz and slew-rate of 2.5 KV/μs [11]. Function circuits based on the CDBA are easily cascadable owing to the availability of output nodes both in voltage source and current source modes. Its accurate port tracking characteristics leads to extremely low circuit sensitivity [3-6]. Another advantage of this active element is that its input pand n-nodes are internally grounded such that the input-parasitic components are effectively at zero potential without introducing any nonideality [7].

The filter structures presented in [2-5] all use more than one CDBA element and the designed center frequency for these are in a range of 1 KHz to 900 KHz. Albeit the nonidealities, owing to the device port mismatch errors, have been examined in these realizations, the effects of the parasitic z-node capacitance (Cz) had not been considered in [3,5,6]. The literature also contains some CDBA based tunable sinewave generators [5-10] wherein structures of [6,7] use a single device.

Here we propose a single CDBA based topology that yields the basic multifilter functional capability with LP, BP, and HP selective characteristics; the nominal input & output nodes remaining same, by only interchanging the RC components appropriately, one obtains the filter function. The sinusoid oscillator realization could be implemented after closing the input to output feedback loop through a unity gain [12] voltage buffer (LM 6118/LM 6218). All these functions have been experimentally verified with PSPICE simulation and hardware circuit test and satisfactory results are obtained.

2. Analysis

The CDBA [1] is a four-terminal active building block with the following terminal relations

The circuit symbols and the CFA-based implementation of the CDBA are shown in Figures 1(a) and (b); the small signal equivalent circuit with the internal transadmittance is shown in Figure 1(c) where . The parameters αp, αn and δ denote the port transfer ratios of the element which may be expressed in terms of some error quantities (ε) for an imperfect device as [1,9,10] and; Usually these errors are quite low[1,10] and they vanish for an ideal CDBA. The typical values for the transadmittance parasitic components are seen in the databook [12] as 3 MΩ ≤ rz ≤ 6 MΩ and 4 pF ≤ Cz ≤ 9 pF. In the proposed designs we had chosen the discrete passive components such that rz is high and Cz is low relative to the corresponding RC values.

The proposed circuit topologies are shown in Figure 2; analysis assuming an ideal CDBA yields a lowpass transfer given by



Figure 1. Symbol of CDBA. (a) Four-terminal CDBA building block; (b) CFA based implementation of CDBA; (c) AD-844 equivalent circuit model.


Figure 2. The proposed circuits, (a) Filter; (b) Oscillator.

where and;

The same circuit yields a BP function (F2) if C1 and R1 are interchanged, given by


where D(s) denotes the same denominator function as in Equation (1)

The resonant-center frequency (ωr) and selectivity (Q) of these filters are



where and. The design equations may be simplified if and, that leads to and

From the BP structure we further interchange R2 and C2 to obtain a HP function in the same topology, given by Equation (5) below.

Here the filter parameters are


A simplified design equation is obtained after taking

and, given by

Hence the same topology in Figure 2(a) realizes all three basic filter functions by suitable choice and location of the minimum number of passive RC components while only a single active CDBA block is employed. For a sinusoid oscillator realization, the nominal output Vo is connected to Vi through a unity gain cell buffer as shown in Figure 2(b) after inserting an additional tuning resistor (Ro) in the topology of Figure 2(a). After connecting Ro, the open-loop transfer (F) between Vo and Vi had been calculated as


The defining equations for the oscillator may be obtained from the characteristic equation, hence we obtain the characteristic equation from Equation (7) as


which yields the following solutions after separating the real and imaginary parts in Equation (8) with

The condition of oscillation (CO) is:


The oscillation frequency is


Thus ωo is single tunable by the resistor Ro and condition for oscillation build-up in Equation (9) and the tuning law in Equation (10) are noninteractive.

3. Nonideal Effects

The major specific nonideal parameters of the CDBA device are the nonunity current transfer ratios at ports p, n and z and nonunity voltage transfer ratio between w and z ports. These ratios have been measured and we found the errors to be extremely low (<2%) over a typical frequency range upto 5 MHz. We have examined these nonideal effects on the proposed design during hardware test in which one set of AD-844 chips was replaced by another, and the filter/oscillator parameters had been seen to be practically active-insensitive. Also the z-node parasitic shunt components rz and Cz cause some deviations in the design parameters; all passive circuit resistors were therefore so chosen such that the effect of their parallel equivalent had negligible effect of rz. Similarly the capacitors are chosen so that its value could be pre-calculated after absorbing the low values of Cz (≈5.1 pF measured). The high impedance current source input nodes p and n of the CDBA are grounded-hence no parasitic noises at the input stimulus which is an added advantage of this active building block [1,10].

The effects of the port mismatch errors of the nonideal CDBA may be examined by writing

, and; owing to finite error magnitudes, the filter parameters would be slightly altered. These modified expressions for ωr, Q and ωo are summarized in Table 1 after assuming. The frequency-stability factor of the oscillator is defined as where θ is loop phase shift. Writing and we derive the stability factor as


Thus the oscillator stability is quite high since

The active-sensitivity of the circuit parameters are all seen to below:


4. Experimental Results

All the proposed filter frequency-responses and oscillator tuning characteristics had been experimentally verified using the PSPICE macromodel simulation [13] and with hardware tests after selecting the passive components appropriately. The CDBA is implemented [6-8] as in Figure 1(b) with a pair of matched AD-844 devices with supply bias level at Vcc = 0 ± 12. V.d.c. The device parasitic transadmittance components are measerued to be rz ≈ 5.5 MΩ and Cz ≈ 5.1 pF. Some typical test results for selectivities in the range of 1 ≤ Q ≤ 10 are shown in Figure 3(a) at fr = 2.7 MHz for the LP and HP functions while Figure 3(b) shows the BP response at fr = 5.7 MHz. The oscillator responses are shown in Figure 4. An experimentally generated waveform by simulation at fo = 3.3 MHz is sown in Figure 4(a); its total harmonic distortion (THD) is measured to be 2.1% and the wave spectrum is shown in Figure 4(b). The fo-tuning characteristics are verified in a range of 500 KHz ≤ fo ≤ 5.5 MHz by adjustment of Ro as shown in Figure 4(c). In Table 2 we list a few comparative features of some recently reported CDBA-based sinusoid oscillator designs.

Table 1. Details of realizability conditions & design equations for Figure 1.


Figure 3. Filter response (a) LP and HP for Q1 ≈ 2.1 at fr = 2.5 MHz with (b) BP for Q2 ≈ 8.1 at fr ≈ 5.1 MHz with C2 = Cz = 5 pF, C1 = 960 pF, R = 300 Ω, ooooo hardware test; ───── simulation.


Figure 4. Experimental response of oscillator, (a) Simulated output waveform at 3.3 MHz with R1 = Ro = 1 KΩ, C1 = C2 = 50 pF; (b) Spectrum of the waveform; (c) Measured fo-tuning characteristics at two band-spreads using R1 = 1 KΩ, ooooo hardware test; ───── simulation upper curve, C1 = C2 = 50 pF; lower curve C1 = C2 = 100 pF.

Table 2. Some comparative features of recently reported CDBA-based oscillators.

5. Conclusion

The design and realization schemes of new frequencyselective filters using a single current differencing buffered amplifier (CDBA) and few RC components are presented. With appropriate selection of a few RC components the same circuit configuration provides lowpass (LP), bandpass (BP) and highpass (HP) filter characteristics. Incorporation of a suitable feedback loop through a voltage buffer unity-gain cell yields a tunable sinusoid oscillator. Effects of the device port errors (ε) and parasitics (Cz) of the active building block are shown to be insignificant and corresponding sensitivities are extremely low. Satisfactory experimental verifications of the filter quality (3 ≤ Q ≤ 9) and oscillator tuning range (500 KHz ≤ fo ≤ 5 MHz) had been carried out. The relative advantages of the proposed designs are presented with tabular form of comparative study covering some recent literature. The CDBA building block is not yet available as an integrated chip form. The proposed circuits had been designed by assembly of the readily available CFA units which limits the usable high frequency application. The authors realize that this limitation could be mitigated by using the OPA-695 (BW ≈ 1.4 GHz) matched dual-pack units.

Conflicts of Interest

The authors declare no conflicts of interest.


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