FPGA Implementable Frame Synchronization Algorithm for Burst Mode GMSK

DOI: 10.4236/cn.2017.91005   PDF   HTML   XML   1,659 Downloads   2,455 Views  

Abstract

In time division multiple access (TDMA) communication systems, correctly estimating the synchronization parameters is very important for reliable data transfer. The algorithms used for frequency/phase and symbol timing estimates are generally accepted as knowing the start of signal (SoS) parameter. Therefore, within these parameters, the SoS parameter is of particularly great importance. In this study, a reduced version of the SoS estimation algorithm introduced by Hosseini and Perrins is presented to estimate SoS for Gaussian Minimum Shift Keying (GMSK) modulated signals in burst format over additive white Gaussian noise (AWGN) channels. The reduced algorithm can be implemented on FPGA by using half the number of complex multipliers that would be required by the double correlation method and is robust to carrier frequency/phase errors. Simulations performed under 0.1 normalized frequency offset conditions show that the proposed algorithm has a probability of false lock which is less than 7×10-2, even at 0 dB SNR level.

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Berkay Gamgam, O. and Levent Atilgan, E. (2017) FPGA Implementable Frame Synchronization Algorithm for Burst Mode GMSK. Communications and Network, 9, 89-100. doi: 10.4236/cn.2017.91005.

1. Introduction

The GMSK modulation has many charming advantages. It is efficient in terms of power and bandwidth because GMSK is a type of continuous phase modulation (CPM) [1] . In addition, GMSK allows the use of non-linear power amplifiers, which makes GMSK suitable for portable transmitters. Since none of the information is carried as amplitude variations, GMSK is more resilient to noise. As a result of these properties, GMSK is used for TDMA communication systems for data or voice transfer, like GSM, deep space communication missions and wireless body area network [2] [3] . Despite its attractive properties, using a maximum likelihood (ML) sequence detector is necessary to optimally demodulate GMSK modulation, which is the main disadvantage of a modulation with memory ( [4] , p. 246).

The GMSK receiver becomes computationally complex enough with ML sequence detector. To eliminate GMSK receiver complexity, many MSK-type digital linear receivers and reduced complexity Viterbi receivers are proposed in the literature, and very close performances to optimum receiver are attained. Zhao and Giannakis [5] introduce a reduced complexity Viterbi receiver, Kaleh [6] proposes a linear coherent receiver optimum for all E b / N 0 values. Wu and Ng [7] propose coherent and non-coherent linear receiver structures for GMSK. However, even with ML sequence detectors, GMSK receivers still fall short in terms of performance. ML sequence detector constructed on frequency/phase and symbol synchronization algorithms gains success, i.e. coherent receiver strip. Symbol synchronization algorithm estimates the symbol offset for finding the correct sampling point to decrease inter symbol interference. Frequency/phase synchronization algorithm is needed to compensate for the effects of the unstable oscillators used in transmitter and receiver. On the other hand, the GMSK receiver becomes more complicated with frequency/phase and symbol timing estimators in order to achieve performance.

To take the burden of synchronization algorithms away from the hardware, symbol level algorithms rather than sample-based ones can be utilized to make use of the resource sharing advantage of FPGA. GMSK synchronization algorithms can roughly be separated into two groups: data aided and non-data aided algorithms [8] . Finding closed loop [9] or open loop [10] symbol-based algorithms is also possible in both groups. Aside from their loop structure, the data aided synchronization algorithms use a known bit sequence for performing estimation [11] , while the non-data aided algorithms use only the received waveform itself for estimating the synchronization parameters [12] . Regardless of the type of synchronization algorithm used, synchronization algorithms generally assume that the SoS is known. Therefore, SoS parameter should first be estimated with enough accuracy to benefit from synchronization algorithms. More- over, if a data aided algorithm is selected for synchronization, the SoS parameter of the received signal should be exactly estimated in order to yield low variance synchronization parameter estimations. Although digital synchronization algorithms are by now well established in the literature, the frame synchronization algorithms for GMSK modulation stay in the background, behind the frequency/phase and symbol synchronization algorithms.

In general, there are two common strategies for frame synchronization algorithms: energy detection and correlation detection. Energy-detection-based algorithms are much more sensitive to noise level and finding a detection threshold is not a trivial task at low SNR values [13] . However, correlation-based algorithms can allow for frame detection at low SNR values by using a moderately short length preamble sequence. In [14] , the introduced two-step algorithm, the preamble detection algorithm (step 1) followed by the preamble estimation algorithm (step 2), showed that 32-bit length preambles can be used to obtain an acceptable level of performance. In this paper, we propose a simplified algorithm that calculates the double correlation metric used for frame synchronization with a remarkable reduction in the number of complex multiplication used by employing a very simple quantization on the expected preamble. The proposed algorithm creates the opportunity for the implementation of additional complex synchronization/detection algorithms of the coherent GMSK receiver strip on the FPGA besides saving in number of complex multiplication. In addition to quantization, by using a 32-symbol length Kasami sequence as preamble sequence of the burst mode transmission, the SoS estimation algorithm is performed in a single step by a simple maximum search operation. A question is, if one can to reduce the number of complex multipliers used in FPGA and the complexity of the SoS estimation algorithm to solve the area efficiency problem. To answer is yes, but proposed frame synchronization approach should be used. Performed simulations show that the proposed algorithm has a false lock probability of less than 7 × 10 2 at 0 dB SNR level and 0.1 normalized frequency offset condition. The developed algorithm is a reduced version of the frame synchronization algorithm given in [14] , which is the same as the ad hoc algorithm introduced in ( [15] , p. 487), and is referred to as a double correlation in [16] .

In the next section, the GMSK signal model is summarized. Section 3 gives the details of the proposed algorithm. Section 4 presents the simulation conditions and the simulation results obtained. Finally, Section 5 concludes the paper. Now, we proceed with the fundamental properties of the GMSK signal model.

2. GMSK Signal

The complex envelope representation of the GMSK signal, s b ( t ) , can be obtained by using the general binary partial response CPM signal with modulation index h = 1 / 2 ,

s b ( t ) = 2 E b T e j ϕ ( t ) , (1)

where E b is the energy per bit, T is the symbol duration, and the phase function, ϕ ( t ) , is

ϕ ( t ) = π 2 n α n g ( t n T ) . (2)

In Equation (2), α n are the equal probable and independent information symbols in the binary alphabet { + 1 , 1 } where the phase pulse, g ( t ) , is

g ( t ) = t f ( τ ) d τ . (3)

f ( t ) is the frequency pulse supported over the time interval ( 0 , L T ) and has the following properties:

f ( t ) = f ( L T t ) ,    L T f ( τ ) d τ = g ( L T ) = 1. (4)

For the GMSK signal, the frequency pulse, f ( t ) , used in (3) can be given as

f ( t ) = 1 T { Q ( σ ( t ( L + 1 ) T 2 ) ) Q ( σ ( t ( L 1 ) T 2 ) ) } , (5)

where σ = 2 π B / ln ( 2 ) , and B is the −3 dB bandwidth of the Gaussian frequency pulse (i.e. the communication bandwidth). Q ( t ) is the Q function defined as

Q ( t ) = 1 2 π t e x 2 / 2 d x .

By substituting Equation (5) into Equation (3), the phase pulse, g ( t ) , can be represented for the GMSK as

g ( t ) = 1 + 1 T { ( t ( L + 1 ) T 2 ) Q ( σ ( t ( L + 1 ) T 2 ) ) ( t ( L 1 ) T 2 ) Q ( σ ( t ( L 1 ) T 2 ) ) 1 σ 2 π ( e ( σ 2 / 2 ) ( t ( L + 1 ) T / 2 ) 2 e ( σ 2 / 2 ) ( t ( L 1 ) T / 2 ) 2 ) } . (6)

It can be observed from Equation (5) that the frequency pulse duration increases as the bandwidth of the pulse decreases. In practical applications, the pulse is truncated to a specified time interval, ( 0 , L T ) . L is chosen such that f ( t ) is sufficiently well approximated. Throughout this paper, this value is taken to be L = 4 , whereas the time bandwidth product is B T = 0.25 .

3. Frame Synchronization Algorithm

For inference of the reduced algorithm and simulations for the performance measure, the assumed signal transmission scheme is given by Figure 1. It is assumed that the transmitter starts the burst transmission after a silent period of unknown duration. The transmission starts with a known preamble, and continues with random data. The preamble part of the signal is composed of a Kasami sequence of N P symbol length. Since this work scrutinizes the estimation of the SoS parameter, the length or content of the remaining random data is unimportant.

The received complex baseband signal, r ( t ) , over an AWGN channel can be represented as

r ( t ) = e j 2 π f o t + θ o s b ( t ) + w ( t ) , (7)

Figure 1. GMSK transmission scheme in burst mode with preamble.

where f o represents the frequency offset, θ o is the uniformly distributed random phase error in the interval [ π , π ) , and w ( t ) is the complex baseband AWGN with zero mean and power spectral density N 0 .

The proposed algorithm uses the sampled received signal at the symbol rate, i.e. one sample for each symbol. The sampled received signal, r [ n ] , can be written as

r [ n ] = r ( t ) | t = n T = e j 2 π f o n T + θ o s b [ n ] + w [ n ] , (8)

where T is the symbol duration.

The estimation of the SoS is finding the boundary of the known preamble from arbitrarily captured N P samples of the received signal given in Equation (8). The decision about the inclusion of preamble fully/partially or not by the captured N P samples is made by using a test function. The result of the test function applied to the captured samples is simply compared with a pre-deter- mined threshold value, which can be determined by a selected probability of false alarm. When the threshold value is exceeded, the preamble is assumed to be located within a particular SoS uncertainty window. The true location of the SoS is determined by simply searching the maximum value of the test function within the SoS uncertainty window.

The ad hoc frame synchronization test function introduced in this work is inspired by the preamble (SoS) detection algorithm derived in [14] , which sums the double correlation functions introduced in [16] for different correlation lag values. The test function, L D ( r ) , used in [14] is

L D ( r ) = d = 1 D | n = 0 N P d 1 r * [ n ] r [ n + d ] s [ n ] s * [ n + d ] | , (9)

where r represents the captured N P samples of the received signal given in Equation (8), s [ n ] is the samples of the expected preamble sequence, and 1 D < N P is the design parameter for the performance of the test function.

By assuming the products of the samples of the known preamble sequence, s [ n ] s * [ n + d ] , are pre-calculated and stored in a read only memory (ROM), the number of complex multipliers required to calculate the test function given in Equation (9) is D ( 2 N P D 1 ) . The major factor behind the number of complex multipliers needed is the inclusion of true values of the expected preamble sequence to Equation (9). In the light of constellation diagram of the transmitted GMSK signal given in Figure 2, if the two-bit quantized values of the preamble sequence, s ^ [ n ] , are used instead of the true values, the number of complex multiplication can be halved. The proposed quantization for the preamble sequence can be given as

s ^ [ n ] = Quant ( Re ( s [ n ] ) ) + j Quant ( Im ( s [ n ] ) ) , (10)

where

Quant ( x ) = { + 1 if x > 0.5 0 if x [ 0.5 , 0.5 ] 1 if x < 0.5 .

Figure 2. Constellation diagram of the transmitted GMSK signal with B T = 0.25 , L = 4 and s b [ n ] = s b ( n T ) .

By using the simple quantization given by Equation (10), the real and imaginary parts of the products of the samples of the known preamble sequence, s ^ [ n ] s ^ * [ n + d ] , can take integer values over [ 2 , 2 ] interval. Therefore, the com- plex multiplication operations turn into simple shift and negate operations. Hence, the required number of complex multiplications for calculating Equation (9) is reduced to D ( N P ( D + 1 ) / 2 ) . In addition, the width of ROM used for storing the s ^ [ n ] s ^ * [ n + d ] product can be reduced remarkably.

The reduced SoS estimation algorithm uses the following test function

L D ( r ) = d = 1 D | n = 0 N P d 1 r * [ n ] r [ n + d ] s ^ [ n ] s ^ * [ n + d ] | , (11)

where s ^ [ n ] represents the quantized N P length preamble sequence.

To further reduce the implementation of the SoS estimation algorithm, the Kasami sequence is selected as the preamble because of its correlation properties. Therefore, estimating the true location of the SoS can be reduced to searching the maximum value of the test function, Equation (11), within the SoS uncertainty window instead of using a computationally complex SoS estimation algorithm.

4. Simulations and Results

In the simulation, two different preamble structures are used. One of them is the optimum synchronization sequence for M-ary signals [14] . The other is a 32-bit Kasami sequence.

The Kasami sequence used as the preamble is selected from the small set of Kasami sequences generated from the x 6 + x + 1 primitive polynomial [17] , [18] . By using the given primitive polynomial, many different 63-bit length Kasami sequences can be generated. The Kasami sequence that we used in the synchronization process is selected as the first 32 consecutive bits of one of the possible 63-bit length sequences. The sequences used in the simulations are presented in Table 1.

There are two synchronizers considered in the simulations. Synchronizer # 1 is designed to maximize the test function, Equation (11), in an interval detected by the pre-determined threshold value. Synchronizer # 2 is a combined version of SoS detection, using Equation (9), and SoS estimation algorithms proposed by Hosseini and Perrins in [14] . Basically, simulation of both Synchronizer # 1 and Synchronizer # 2 consists of two distinct steps. In the step 1, both synchronizers use the captured N P = 32 samples of the time domain data to find the start of the SoS uncertainty window by using their test functions, and the point where test function exceeds the predetermined threshold, λ , for the first time is detected. By starting from the point one sample earlier than the detected point, the 2 N P = 64 sample length window is assumed as the SoS estimation interval (uncertainty window). An illustration of the manner in which the SoS uncertainty window is determined for Synchronizer # 1 and Synchronizer # 2 are presented in Figure 3 and Figure 4. In the second step, Synchronizer # 1 takes the point at which the test function, Equation (11), is maximized in the SoS

Figure 3. Synchronizer #1 output. The Kasami sequence is transmitted as preamble, quantization is applied and E b / N 0 = 0 dB, D = 8 .

Table 1. Preamble sequences used in the simulations.

Figure 4. Synchronizer #2 output. The optimum preamble sequence is transmitted as preamble, quantization is not applied and E b / N 0 = 0 dB, D = 8 .

estimation interval as the true location of the SoS. Synchronizer # 2 performs the SoS estimation algorithm, computationally more complex than maximum finding operation, on the determined 64 sample length SoS estimation interval to estimate the location of the SoS [14] .

The threshold value, λ , is determined using the Neyman-Pearson criterion for a fixed false alarm probability, P F A . The definition of the false alarm probability is given as P F A = Pr { L D ( r ) > λ } such that r consists of only noise samples. Throughout the simulation, all of the threshold values are calculated for P F A = 10 4 and E b / N 0 = 0 dB. By using 10 7 noise-only samples, the threshold value is found as 91.7 for Synchronizer # 1 and 91.6 for Synchronizer # 2 .

In the simulations, 10 million independent frames are generated and to evaluate the system performance, the false lock probabilities, P F L , are calculated empirically by counting the frame synchronization failures. Each frame is assumed as being composed of a 5 N P = 160 sample silence duration followed by a N P = 32 sample preamble and 5 N P = 160 samples of random data, see Figure 1.

For ease of implementation, the D value in (11) should be selected to be as small as possible in its defined interval. The tradeoff is that system performance decreases with decreasing D . The performance of Synchronizer # 1 with respect to D is presented in Figure 5. The key point is that the relation between D and system performance is not linear. Therefore, we can select D in such a way that both system performance and complexity are at an acceptable level. Under these circumstances, D = 8 is a good choice.

Figure 5. Effect of design parameter, D , in Equation (11) by simulating 10 5 frames at E b / N 0 = 0 dB.

The effect of quantization on system complexity is mentioned in Section 3. At the expense of computation precision loss, a considerable number of complex multipliers are saved. To examine the trade-off between system performance and quantization, the probability of false lock performance of Synchronizer # 1 is compared for the two cases, one in which quantization is utilized and one in which it is not. The comparison is presented in Figure 6. According to the results, the effect of quantization on system performance is negligibly small. We would rather to use quantized values instead of using the true values, which are too close to each other for GMSK modulation see Figure 2. Because these two values are so close to each other, our modification results in a negligibly small performance loss.

The performance of 3 different synchronizer structures are compared in terms of false lock probability in Figure 7. The normalized frequency offset is 0.1 and the phase offset is uniformly distributed in the interval [ 0 , 2 π ] . At first, Synchronizer # 1 (with quantized Kasami preamble) and Synchronizer # 2 (with unquantized Optimum preamble) are taken into consideration. The main contributions of Synchronizer # 1 , which are reducing the number of complex multipliers by quantization and reducing the complexity of SoS estimation algorithm by simply finding the maximum point in the detected uncertainty window, caused less than a 1 dB loss for P F L = 10 5 . Secondly, Synchronizer # 1 (with quantized Kasami preamble) and Synchronizer # 2 (with unquantized Kasami preamble) are taken into consideration. Synchronizer # 2 with Kasami preamble performed the best, as expected, since it uses an additional estimation algorithm, [14] , in the detected uncertainty window. Although in Synchronizer # 1 ,

Figure 6. Effect of quantization of the Kasami sequence by simulating 10 7 frames with 0.1 normalized frequency offset and D = 8 .

Figure 7. Comparison of synchronizers by simulating 10 7 frames at 0.1 normalized frequency offset condition.

less than 3 dB loss is observed for P F L = 10 5 , Synchronizer # 2 is not easy to implement. The key point in this comparison is the trade-off between system performance and reduced complexity.

5. Conclusion

In this paper, to improve the performance of a coherent receiver, which uses SoS estimation, double correlation algorithm was implemented. Especially, we focused on the SoS estimation problem for burst mode GMSK transmission. Firstly, the number of complex multipliers were halved by quantizing the GMSK modulated preamble data, which is used in the double correlation. Secondly, a single step SoS estimation algorithm which simply estimates SoS as the maximum point of the proposed test function in the uncertainty window was developed by using the Kasami sequence as preamble. Complexity of an algorithm has a prior importance in the sense of its efficiency. The combination of reduction in the number of complex multipliers and a single step SoS estimation reduce the complexity of the frame synchronization process drastically. The simulation results showed that the effect of the quantization on system performance is negligibly small. At low SNR values, the proposed Synchronizer # 1 and the Synchronizer # 2 given in [14] have almost the same P F L values. For P F L = 10 5 , less than 1 dB difference is observed between Synchronizer # 1 and the Synchronizer # 2 . Thus, the power and area efficiencies of the double correlation algorithm increase while the number of complex multiplier decreases with a reasonable performance loss. The proposed approach can be a practical candidate for frame synchronization algorithms of communication systems using GMSK modulation.

Acknowledgements

The research described in this paper was sponsored in part by the Meteksan Defense Industry Inc., Electronic Design Department. The authors also thank a referee(s) and an editor for their comments on an earlier version of this paper.

Conflicts of Interest

The authors declare no conflicts of interest.

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