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[1]
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Study and Comparison of H. 265/HEVC Video Coding Architectures
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INTERNATIONAL JOURNAL FOR ADVANCED RESEARCH IN SCIENCE & TECHNOLOGY,
2021 |
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|
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[2]
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Video Coding and Processing: A Survey
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2020 |
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[3]
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An Efficient Design of DCT Approximation Based on Quantum Dot Cellular Automata (QCA) Technology
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2019 |
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[4]
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Implementation analysis of HEVC encoding on Zynq platform under embedded Linux
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2017 |
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[5]
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Approximated transform and quantisation for complexity-reduced high efficiency video coding
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2017 |
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[6]
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An efficient hybrid integer coefficient-DCT architecture using quantization module for HEVC standard
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2017 |
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[7]
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A hierarchical multiplier-free architecture for HEVC transform
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Multimedia Tools and Applications,
2017 |
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[8]
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Enhanced hybrid quality prediction model for 8K UHD H. 265 video using ANFIS
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2017 |
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[9]
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DESIGN SCALABLE APPROXIMATE DCT ARCHITECTURE FOR VIDEO CODING APPLICATION
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International Journal of Innovative Research in Engineering Science and Technology,
2017 |
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[10]
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Fast Algorithm Designs of Multiple-Mode Discrete Integer Transforms with Cost-Effective and Hardware-Sharing Architectures for Multistandard Video Coding …
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Recent Advances In Image And Video Coding,
2016 |
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[11]
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Implementation analysis of HEVC encoding on dual ARM Cortex A15 architecture
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2016 |
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[12]
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A fast algorithm-based cost-effective and hardware-efficient unified architecture design of 4× 4, 8× 8, 16× 16, and 32× 32 inverse core transforms for HEVC
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Journal of Signal Processing Systems,
2016 |
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[13]
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Fast Algorithm Designs of Multiple-Mode Discrete Integer Transforms with Cost-Effective and Hardware-Sharing Architectures for Multistandard Video Coding …
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2016 |
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[14]
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Implementation High-Level Syntax Architecture for Efficient Integer DCT for HEVC
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2015 |
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[15]
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應用於多視訊壓縮標準且基於快速演算法之具成本效益及硬體分享的多模式離散轉換架構設計
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2015 |
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[16]
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Integer DCT Convergence for JPEG-75 Forensics for Images
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2015 |
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[17]
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VLSI Implementation and Area Efficient Cordic based Integer DCT Architectures for HEVC
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International Journal of Innovative Research in Science, Engineering and Technology,
2015 |
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[18]
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Efficient Integer DCT Architectures for HEVC
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2015 |
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[19]
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Discrete cosine transforms Architectures for High Efficiency Video Coding
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IJEEC: INTERNATIONAL JOURNAL OF ELECTRICAL ELECTRONICS AND COMMUNICATION,
2015 |
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[20]
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Nonorthogonal DCT implementation for JPEG forensics
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2014 |
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[21]
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Nonorthogonal dct block convergence for jpeg-75 forensics
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2014 |
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[22]
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Unified algorithms for computation of different points integer 1-D DCT/IDCT for the HEVC standard
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International Conference on Software Intelligence Technologies and Applications & International Conference on Frontiers of Internet of Things 2014,
2014 |
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[23]
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VLSI implementation of discrete cosine transform and Intra prediction
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2014 |
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[24]
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HARDWARE-EFFICIENT MULTI-STANDARD VIDEO TRANSFORM CORE
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Journal of Circuits, Systems, and Computers,
2014 |
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[25]
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Nonorthogonal DCT implementation for JPEG forensics.
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2014 |
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[26]
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Superpredictive modeling for sequential analysis
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ProQuest Dissertations Publishing,
2014 |
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[27]
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Implementation of Efficient Integer DCT Architectures for HEVC
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2014 |
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[28]
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IMPLEMENTATION OF REUSABLE DCT ARCHITECTURES
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Journal Research in Electrical Electronics and Communications,
2013 |
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[29]
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A variable block-size design of HEVC transform using intra-coefficient sharing
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2013 |
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[30]
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Free multiplication integer transformation for the HEVC standard
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2013 |
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[31]
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Design optimization of the quantization and a pipelined 2D-DCT for real-time applications
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Multimedia Tools and Applications,
2013 |
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[32]
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Multi-scale scheduling techniques for signal processing systems
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ProQuest Dissertations Publishing,
2013 |
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[33]
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A framework for self-reconfigurable DCTs based on Multiobjective Optimization of the Power-Performance-Accuracy space
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2012 |
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[34]
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N point DCT VLSI architecture for emerging HEVC standard
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VLSI Design - Special issue on VLSI Circuits, Systems, and Architectures for Advanced Image and Video Compression Standards,
2012 |
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[35]
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N Point DCT VLSI Architecture for Emerging HEVC Standard.
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2012 |
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[36]
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𝑁 Point DCT VLSI Architecture for Emerging HEVC Standard
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2012 |
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[37]
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Fast Multiplier-less Implementation of B-spline basis with enhanced compression performance
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2011 |
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[38]
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VLSI implementation of 16-point DCT for H. 265/HEVC using walsh hadamard transform and lifting scheme
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2011 |
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[39]
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Fast Multiplier-less Implementation of Bspline Basis with Enhanced Compression Performance
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American Journal of Signal Processing,
2011 |
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