Error Correction Circuit for Single-Event Hardening of Delay Locked Loops

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ISSN Print: 2153-1285
ISSN Online: 2153-1293
www.scirp.org/journal/cs
E-mail: cs@scirp.org

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"Error Correction Circuit for Single-Event Hardening of Delay Locked Loops"
written by S. Balaji, S. Ramasamy,
published by Circuits and Systems, Vol.7 No.9, 2016

has been cited by the following article(s):

[1]	Impact of neutron induced Single-Event Multiple Transients in ADDLL based frequency multiplier
	AEU-International Journal of …, 2022

[2]	Single-Event-Hardened All-Digital Delay Generator for FPGA-Based Implementation of a TDC-based readout electronics
	Journal of Instrumentation, 2017

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