has been cited by the following article(s):
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[1]
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Method for Precise Timing and Duty Cycle Adjustment in I/O Pads
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2020 |
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[2]
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Transmitter Output Impedance Calibration Method
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2018 |
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[3]
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Data interface buffer compensation scheme for fast calibration
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2017 |
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[4]
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PHY Link Design and Optimization For High-Speed Low-Power Communication Systems
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2015 |
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[5]
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Calibration schemes for charge-recycling stacked voltage domains
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US Patent 8,797,084,
2014 |
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[6]
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Estimation and compensation of process-induced variations in capacitors for improved reliability in integrated circuits
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Analog Integrated Circuits and Signal Processing, Springer,
2014 |
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[7]
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Low-power design of hybrid digital impedance calibration for process, voltage, temperature compensations
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Electronics, Circuits, and Systems (ICECS), 2013 IEEE 20th International Conference on. IEEE,
2013 |
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[1]
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Machine Learning-based Design and Optimization of High-Speed Circuits
2024
DOI:10.1007/978-3-031-50714-4_3
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[2]
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Heterogeneity-induced synchronization in delay-coupled electronic oscillators
Physical Review E,
2022
DOI:10.1103/PhysRevE.106.L052201
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[3]
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METHOD FOR PRECISE TIMING AND DUTY CYCLE
ADJUSTMENT IN I/O PADS
i-manager's Journal on Circuits and Systems,
2020
DOI:10.26634/jcir.8.1.17598
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[4]
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Transmitter Output Impedance Calibration Method
2018 IEEE East-West Design & Test Symposium (EWDTS),
2018
DOI:10.1109/EWDTS.2018.8524665
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[5]
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Data interface buffer compensation scheme for fast calibration
2017 18th International Symposium on Quality Electronic Design (ISQED),
2017
DOI:10.1109/ISQED.2017.7918331
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[6]
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Estimation and compensation of process-induced variations in capacitors for improved reliability in integrated circuits
Analog Integrated Circuits and Signal Processing,
2014
DOI:10.1007/s10470-014-0390-1
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[7]
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Low-power design of hybrid digital impedance calibration for process, voltage, temperature compensations
2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS),
2013
DOI:10.1109/ICECS.2013.6815339
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