SRAM; Low-Power; Active Power; Standby Power; Gate Leakage; Sub-Threshold Leakage - Articles

Characterization of a Novel Low-Power SRAM Bit-Cell Structure at Deep Sub-Micron CMOS Technology for Multimedia Applications (Articles)

Rakesh Kumar Singh, Manisha Pattanaik, Neeraj Kr. Shukla

Circuits and Systems Vol.3 No.1，December 31, 2011

DOI: 10.4236/cs.2012.31004 6,086 Downloads 10,460 Views Citations
An Improved SOI CMOS Technology Based Circuit Technique for Effective Reduction of Standby Subthreshold Leakage (Articles)

Manish Kumar, Md. Anwar Hussain, Sajal K. Paul

Circuits and Systems Vol.4 No.6，September 30, 2013

DOI: 10.4236/cs.2013.46056 5,573 Downloads 8,602 Views Citations
New Hybrid Digital Circuit Design Techniques for Reducing Subthreshold Leakage Power in Standby Mode (Articles)

Manish Kumar, Md. Anwar Hussain, Sajal K. Paul

Circuits and Systems Vol.4 No.1，January 28, 2013

DOI: 10.4236/cs.2013.41012 5,899 Downloads 9,605 Views Citations
Ultra-Low Power Designing for CMOS Sequential Circuits (Articles)

Patikineti Sreenivasulu, Srinivasa Rao, Vinaya Babu

Int'l J. of Communications, Network and System Sciences Vol.8 No.5，May 11, 2015

DOI: 10.4236/ijcns.2015.85016 4,087 Downloads 5,324 Views Citations
Leakage Analysis of a Low Power 10 Transistor SRAM Cell in 90 nm Technology (Articles)

Parimaladevi Muthusamy, Sharmila Dhandapani

Circuits and Systems Vol.7 No.6，May 27, 2016

DOI: 10.4236/cs.2016.76087 2,050 Downloads 4,215 Views Citations
Stability and Leakage Analysis of a Novel PP Based 9T SRAM Cell Using N Curve at Deep Submicron Technology for Multimedia Applications (Articles)

Shilpi Birla, Rakesh Kumar Singh, Manisha Pattanaik

Circuits and Systems Vol.2 No.4，October 17, 2011

DOI: 10.4236/cs.2011.24038 6,974 Downloads 11,628 Views Citations
Leakage Reduction Using DTSCL and Current Mirror SCL Logic Structures for LP-LV Circuits (Articles)

Sanjeev Rai, Ram Awadh Mishra, Sudarshan Tiwari

Circuits and Systems Vol.4 No.1，January 25, 2013

DOI: 10.4236/cs.2013.41005 5,018 Downloads 7,831 Views Citations
Design and Implement of Low Power Consumption SRAM Based on Single Port Sense Amplifier in 65 nm (Articles)

Shunrui Li, Jianjun Chen, Zuocheng Xing, Jinjin Shao, Xi Peng

Journal of Computer and Communications Vol.3 No.11，November 19, 2015

DOI: 10.4236/jcc.2015.311026 3,044 Downloads 4,330 Views Citations
A New Technique for Leakage Reduction in 65 nm Footerless Domino Circuits (Articles)

Tarun Kumar Gupta, Kavita Khare

Circuits and Systems Vol.4 No.2，April 18, 2013

DOI: 10.4236/cs.2013.42028 6,069 Downloads 9,440 Views Citations
Fast CR-SRAM Using New Charge-Recycling Scheme (Articles)

Leilei Li, Xin Chen, Xu Wang

Engineering Vol.4 No.8，August 31, 2012

DOI: 10.4236/eng.2012.48064 4,539 Downloads 6,446 Views Citations
Low Power Micro Analog Multichannel (Articles)

Dingding Xian, Chuan Yu, Jingting Xian

Open Access Library Journal Vol.9 No.9，September 29, 2022

DOI: 10.4236/oalib.1109207 46 Downloads 346 Views Citations
Advanced Burst Mode Control to Reduce the Standby Power of Flyback Converter (Articles)

Min-Sung Kim, Hyoung-Woo Kim, Ji-Hye Jang, Ki-Hyun Kim

Engineering Vol.5 No.1B，January 16, 2013

DOI: 10.4236/eng.2013.51B025 9,138 Downloads 11,626 Views Citations
Designing a Full Adder Circuit Based on Quasi-Floating Gate (Articles)

Sahar Bonakdarpour, Farhad Razaghian

Energy and Power Engineering Vol.5 No.3B，July 31, 2013

DOI: 10.4236/epe.2013.53B012 6,400 Downloads 7,848 Views Citations
Analysis of 8T SRAM Cell at Various Process Corners at 65 nm Process Technology (Articles)

Shilpi Birla, Neeraj Kumar Shukla, Kapil Rathi, Rakesh Kumar Singh, Manisha Pattanaik

Circuits and Systems Vol.2 No.4，October 24, 2011

DOI: 10.4236/cs.2011.24045 8,320 Downloads 15,536 Views Citations
VLSI Implementation for Low Noise Power Efficiency Cellular Communication Systems (Articles)

Rondia MACK, Maher RIZKALLA, Paul SALAMA, Mohamed EL-SHARKAWY

Wireless Sensor Network Vol.2 No.1，January 12, 2010

DOI: 10.4236/wsn.2010.21003 5,887 Downloads 10,828 Views Citations
Voltage Controlled Ring Oscillator Design with Novel 3 Transistors XNOR/XOR Gates (Articles)

Manoj Kumar, Sandeep Kumar Arya, Sujata Pandey

Circuits and Systems Vol.2 No.3，July 11, 2011

DOI: 10.4236/cs.2011.23027 9,248 Downloads 16,534 Views Citations
Design of Low Power and High Speed CMOS Comparator for A/D Converter Application (Articles)

Shubhara Yewale, Radheshyam Gamad

Wireless Engineering and Technology Vol.3 No.2，April 28, 2012

DOI: 10.4236/wet.2012.32015 17,487 Downloads 32,017 Views Citations
Low Power Transceiver Design Parameters for Wireless Sensor Networks (Articles)

Adinya John Odey, Daoliang Li

Wireless Sensor Network Vol.4 No.10，October 30, 2012

DOI: 10.4236/wsn.2012.410035 7,912 Downloads 12,832 Views Citations
A 0.9 V Supply OTA in 0.18 μm CMOS Technology and Its Application in Realizing a Tunable Low-Pass Gm-C Filter for Wireless Sensor Networks (Articles)

Soolmaz Abbasalizadeh, Samad Sheikhaei, Behjat Forouzandeh

Circuits and Systems Vol.4 No.1，January 25, 2013

DOI: 10.4236/cs.2013.41007 6,675 Downloads 11,864 Views Citations
Performance Prospects of Fully-Depleted SOI MOSFET-Based Diodes Applied to Schenkel Circuit for RF-ID Chips (Articles)

Yasuhisa Omura, Yukio Iida

Circuits and Systems Vol.4 No.2，April 17, 2013

DOI: 10.4236/cs.2013.42024 4,751 Downloads 7,517 Views Citations

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