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Comparative Simulation Study between Gate Firing Units for HVDC Rectifier Based on CIGRE Benchmark Model

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DOI: 10.4236/epe.2011.32016    5,525 Downloads   10,206 Views   Citations

ABSTRACT

A simulation study between the DQO gate firing unit (GFU) and a proposed GFU for high voltage direct current (HVDC) rectifier based on the CIGRE benchmark model in Matlab/Simulink is carried out. The proposed GFU does not use traditional phase lock loop (PLL) and offers structural simplicity, fast response and immunity to ac system voltage unbalance, harmonics, voltage sag, frequency jump and phase jump etc. Since there is no loop filter, no tuning issues are involved. Advantages of the proposed GFU are confirmed by extensive simulation results.

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B. Das, N. Watson and Y. Liu, "Comparative Simulation Study between Gate Firing Units for HVDC Rectifier Based on CIGRE Benchmark Model," Energy and Power Engineering, Vol. 3 No. 2, 2011, pp. 120-134. doi: 10.4236/epe.2011.32016.

Conflicts of Interest

The authors declare no conflicts of interest.

References

[1] The Joint Research Centre (JRC), European Union, “Towards the Super Grid for More Renewable Energy,” 5 July, 2010.
[2] V. Khatri, V. K. Sood and H. Jin, “Analysis and EMTP Simulation of a conventional Gate Firing Unit for HVDC Converters Operating with Weak AC Systems,” Proceedings of the 1994 Canadian Conference on Electrical and Computer Engineering, Vol. 1, 25-28 September 1994, pp. 173-177. doi: 10.1109/CCECE.1994.405634
[3] V. Khatri, V. K. Sood and H. Jin, “EMTP Simulation of an HVDC Rectifier Operating with A Weak AC System,” Proceedings of the IEEE 4th Workshop on Computers in Power Electronics, 7-10 August 1994, pp.91-95. doi: 10.1109/CIPE.1994.396733
[4] V. K. Sood, V. Khatri and H. Jin, “Performance Assessment using EMTP of two Gate Firing Units for HVDC Converters operating with Weak AC Systems,” Proceedings of the International Conference on Power System Transients, Technical University of Lisbon, Portugal, September 3-7 1995, pp. 517-522.
[5] J. D. Ainsworth, “The Phase-Locked Oscillator: A New Control System for Controlled Static Convertors,” IEEE Transactions on Power Apparatus and Systems, Vol. PAS-87, No. 3, 1968, pp. 859-865. doi:10.1109/TPAS.1968.292202
[6] S. K. Chung, “A Phase Tracking System for Three Phase Utility Interface Inverters,” IEEE Transactions on Power Electronics, Vol. 15, No. 3, 2000, pp. 431-438. doi:10.1109/63.844502
[7] J. A. Crawford, “Advanced Phase Lock Techniques,” Artech House, London, 2008.
[8] R. Weidenbrüg, F. Dawson and R. Bonert, “New Synchronization Method for Thyristor Power Converters to Weak AC-Systems,” IEEE Transactions on Industrial Electronics, Vol. 40, No. 5, 1993, pp. 505-511. doi:10.1109/41.238019
[9] S. V?liviita, “Zero-Crossing Detection of Distorted Line Voltages Using 1-B Measurements,” IEEE Transactions on Industrial Electronics, Vol. 46, No. 5, 1999, pp. 917- 922. doi:10.1109/41.793339
[10] Sang-Joon Lee, Jun-Koo Kang and Seung-Ki Sul, “A New Phase Detecting Method for Power Conversion Systems Considering Distorted Conditions in Power System,” Proceedings of the Thirty-Fourth IAS Annual Meeting Industry Applications Conference, 3-7 October 1999, Phoenix, pp. 2167-2172. doi: 10.1109/IAS.1999.798754
[11] P. Rodriguez, L. Sainz and J. Bergas, “Synchronous Double Reference Frame PLL Applied to a Unified Power Quality Conditioner,” Proceedings of the 10th International Conference on Harmonics and Quality of Power, Vol. 2, 2002, pp. 614-619. doi: 10.1109/ICHQP.2002.1221506
[12] D. Jovcic, “Phase Locked Loop System for FACTS,” IEEE Transactions on Power Systems, Vol. 18, No. 3, 2003, pp. 1116-1124. doi:10.1109/TPWRS.2003.814885
[13] M. Karimi-Ghartemani and M. R. Iravani, “A Method for Synchronization of Power Electronic Converters in Polluted and variable-Frequency Environments,” IEEE Transactions on Power Systems, Vol. 19, No. 3, 2004, pp. 1263-1270. doi:10.1109/TPWRS.2004.831280
[14] M. Karimi-Ghartemani, H. Karimi and M. R. Iravani, “A Magnitude/Phase-Locked Loop System Based on Estimation of Frequency and in-Phase/Quadrature-Phase Amplitudes,” IEEE Transactions on Industrial Electronics, Vol. 51, No. 2, 2004, pp. 511-517. doi:10.1109/TIE.2004.825282
[15] Yang Han, Lin Xu, Muhammad Mansoor Khan, Gang Yao, Li-Dan Zhou and Chen Chen, “A Novel Synchronization Scheme for Grid-Connected Converters by Using Adaptive Linear Optimal Filter Based PLL (ALOF- PLL),” Simulation Modelling Practice and Theory, Vol. 17, No. 7, 2009, pp. 1299-1345. doi:10.1016/j.simpat.2009.05.004
[16] Z. Yao, “Fundamental Phasor Calculation with Short Delay,” IEEE Transactions on Power Delivery, Vol. 23, No. 3, 2008, pp.1280-1287. doi:10.1109/TPWRD.2008.916734
[17] B. P. Das, N. Watson and Y. Liu, “6-Pulse Controlled Rectifier Synchronisation Method,” Proceedings of the IEEE Applied Power Electronics Colloquium (IAPEC), Malaysia, 18-19 April 2011, pp. 45-50.
[18] V. K. Sood, “HVDC and FACTS Controllers: Applications of Static Converters in Power Systems,” Kluwer Academic Publishers, Boston, 2004.

  
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