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Numerical Study of Conjugate Heat Transfer for Cooling the Circuit Board

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1. Introduction

Electronic equipment has made its way into practically every aspect of modern life, from toys and appliances to high-power computers. The reliability of the electronics of a system is a major factor in the overall reliability of the system. Electronic components depend on the passage of electric current to perform their duties, and they become potential sites for excessive heating, since the current flow through a resistance is accompanied by heat generation. Continued miniaturization of electronic systems has resulted in a dramatic increase in the amount of heat generated per unit volume, comparable in magnitude to those encountered at nuclear reactors and the surface of the sun. Unless properly designed and controlled, high rates of heat generation result in high operating temperatures for electronic equipment, which jeopardizes its safety and reliability. The failure rate of electronic equipment increases exponentially with temperature. Also, the high thermal stresses in the solder joints of electronic components mounted on circuit boards resulting from temperature variations are major causes of failure. Therefore, thermal control has become increasingly important in the design and operation of electronic equipment. The maximum operating temperature has implications both on the chip and package level reliability and performance. At the chip level, the non-uniformity in temperature leads to a clock skew [1] . Also, higher interconnect temperatures accompanied with high current densities lead to enhanced electro-migra- tion. At the package level, higher absolute temperatures accelerate thermally driven failure mechanisms including intermetallic growth, corrosion, metal migration and void formation [2] . Conjugate heat transfer in microelectronic equipment has received considerable attention from heat transfer researchers, because of rapid increase in power dissipation of LSI chips and downsizing of electronic devices. Ramadhyani et al. [3] and Sugavanam et al. [4] reported the results of numerical analysis on the conjugate heat transfer from two-dimensional flush-mounted heat sources to laminar flow in the channel. Incropera et al. [5] and Ortega et al. [6] did experiments for two-dimensional flush-mounted heat sources. Nakayama and Park [7] did both the numerical simulations and experiments. They concentrated their attention on the heat transfer from the floor area near the surface-mounted block and discussed how to develop a specific prediction method of the conjugate heat transfer. Zhang et al. [8] discussed how to define an effective heat transfer area to solve the problems of the conjugate heat transfer from small heat sources mountedon a conductive wall. Yoshino et al. [9] further summarized their numerical results of the conjugate heat transfer behavior of an electronic chip module cooled by air, based on the effective heat transfer area. In this paper, a flat circuit board with a heat generating electronic chip mounted on it has been studied numerically and conjugate heat transfer over the chips have been investigated for different inlet mass flow rates with various temperatures. In this work a 3D model of a flat circuit board with a heat generating electronic chip mounted on it has been studied numerically. The flow over the chip is laminar and involves conjugate heat transfer. Effects of various inlet velocities have been studied on the heat transfer variation and temperature of the circuit board.

2. Problem Definition

Figure 1 shows the schematic and grid generation of the problem considered in this study. The configuration consists of a series of side-by-side electronic chips, or modules, mounted on a circuit board. Air flow, confined between the circuit board and an upper wall, cools the modules. To take advantage of the symmetry present in the problem, the model will extend from the middle of one module to the plane of symmetry between it and the next module. As shown in the figure, each half-module is assumed to generate 2.0 Watts and to have a bulk conductivity of 1.0-K. The circuit board conductivity is assumed to be one order of magnitude lower: 0.1-K. The air flow enters the

Figure 1. Geometry and grid generation.

system at 298 K with a velocity of 1 m/s. The Reynolds number of the flow, based on the module height, is about 600. The flow is therefore treated as laminar.

3. Problem Definition

Figure 2 shows the contours of temperature over the chip in the circuit board for the inlet velocity of 1 m/s and temperature of 298 K. The temperature contour is distributed evenly over the circuit board. The maximum temperature occurs on the chip with value of 408 K and as seen the temperature of the board increases up to 300 K compared to its primary of 298 K as the flow passes over the chip at the downstream of the board.

Figure 3 shows velocity vector and magnitude for inlet bulk temperature of 298 K and velocity of 1 m/s. The maximum velocity increases to 1.41 m/s from its primary value of 1 m/s which occurs at both sides of chip and also on top of the chip as it is shown in symmetry velocity vector. The lowest velocity occurs behind the chip where

Figure 2. Temperature contour for inlet bulk temperature of 298 K and velocity of 1 m/s.

Figure 3. Velocity vector and magnitude for inlet bulk temperature of 298 K and velocity of 1 m/velocity of 1 m/s.

the flow circulates in that region.

Figure 4 displays streamlines for inlet bulk temperature of 298 K and velocity of 1 m/s. As seen the maximum value occurs on both sides of the chip and the region behind the chip on the circuit board. As again can be seen from the figure from the symmetry fluid velocity the velocity has its maximum at the top of the chip.

Figure 5 displays streamlines for inlet bulk temperature of 298 K and different velocities. As seen from the figure, the maximum temperature of the chip and the circuit board reduces. For the inlet velocity of 1 m/s the maximum temperature of the chip is about 408 K and for the circuit board is around 330 K. These values reduce for the chip and the board to 390 and 312 K respectively. As the inlet flow velocity increases more the chip and the board temperatures reduces more. For inlet velocity of 3 m/s the temperature reduces to 388 K and 311 K for chip and the circuit board. Similar results

Figure 4. Straem lines for inlet bulk temperature of 298 K and velocity of 1 m/s. 298 K and velocity of 1 m/s.

Figure 5. Temperature contour for inlet bulk temperature of 298 K and various velocities of 1, 3, 5 and 7 m/s.

Figure 6. Velocity vector and magnitude for inlet bulk temperature of 298 K and various velocities of 1, 3, 5 and 7 m/s.

for the inlet velocity of 7 m/s where the temperature of the chip decreases to 387 and circuit board to 310 K. As seen the temperature difference for the inlet velocities of 5 and 7 m/s is not much which shows that for a certain value of inlet velocity there is a noticeable reduction in the temperature and for values greater than that the temperature stays the same with negligible difference.

Figure 6 depicts the velocity vector and magnitude for inlet bulk temperature of 298 K and various velocities. As seen from the figure, the maximum velocity increasers as the inlet flow velocity increases. For the inlet velocity of 1 m/s the maximum velocity is about 1.41 m/s and this value increases to 4.17 m/s for inlet flow velocity of 3 m/s. As the inlet flow velocity increases the maximum velocity over the circuit board increases as well. For inlet velocity of 5 and 7 m/s the maximum velocities increase to 6.94 and 9.74 m/s.

4. Conclusion

In this study, a 3D model of a flat circuit board with a heat generating electronic chip mounted on it has been studied numerically. The flow over the chip is laminar and involves conjugate heat transfer. Effects of various inlet velocities have been studied on the heat transfer variation and temperature of the circuit board. As the results show, increasing the inlet velocity reduces the circuit board and chip temperatures significantly and increases the maximum velocity over the circuit board and the chip.

Acknowledgements

The author would like to thank both The Saudi Arabia Cultural Mission and University of North Border, Arar.

Conflicts of Interest

The authors declare no conflicts of interest.

Cite this paper

*Journal of Electronics Cooling and Thermal Control*,

**6**, 120-126. doi: 10.4236/jectc.2016.63011.

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