Design and Implementation of Efficient Reversible Arithmetic and Logic Unit

Subramanian Saravanan^1*, Ila Vennila¹, Sudha Mohanram²

¹Department of EEE, P. S. G. College of Technology, Coimbatore, India.
²Sri Eshwar College of Engineering, Kondampatty, Coimbatore, India.

DOI: 10.4236/cs.2016.76054                

Abstract

In computing architecture, ALU plays a major role. Many promising applications are possible with ATMEGA microcontroller. ALU is a part of these microcontrollers. The performance of these microcontrollers can be improved by applying Reversible Logic and Vedic Mathematics. In this paper, an efficient reversible Arithmetic and Logic Unit with reversible Vedic Multiplier is proposed and the simulation results show its effectiveness in reducing quantum cost, number of gates, and the total number of logical calculations.

Keywords

Reversible Logic Gates, Reversible Logic Circuits, Reversible Multiplier Circuits, Vedic Multiplier, ALU

Conflicts of Interest

The authors declare no conflicts of interest.

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