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ΔIDDQ Testing of a CMOS Digital-to-Analog Converter Considering Process Variation Effects

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DOI: 10.4236/cs.2011.23020    4,330 Downloads   7,905 Views   Citations


In this paper, we present the implementation of a built-in current sensor (BICS) which takes into account the increased background current of defect-free circuits and the effects of process variation on ΔIDDQ testing of CMOS data converters. A 12-bit digital-to-analog converter (DAC) is designed as the circuit under test (CUT). The BICS uses frequency as the output for fault detection in CUT. A fault is detected if it causes the output frequency to deviate more than ±10% from the reference frequency. The output frequencies of the BICS for various (MOSIS) model parameters are simulated to check for the effect of process variation on the frequency deviation. A set of eight faults simulating manufacturing defects in CMOS data converters are injected using fault-injection transistors and tested successfully.

Conflicts of Interest

The authors declare no conflicts of interest.

Cite this paper

R. Soundararajan, A. Srivastava and S. Yellampalli, "ΔIDDQ Testing of a CMOS Digital-to-Analog Converter Considering Process Variation Effects," Circuits and Systems, Vol. 2 No. 3, 2011, pp. 133-138. doi: 10.4236/cs.2011.23020.


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