High Wall-Plug Efficiency 1060 nm High Power Semiconductor Laser

By analyzing the factors which affect the wall-plug efficiency of semiconductor Laser Diodes (LDs), a high efficiency 1060 nm LD was designed, including active region, waveguide layers, and cladding layers. The simulation result shows that the component of In in InGaAs in the active region cannot be too small, otherwise the thickness of InGaAs active layer will exceed the critical thickness, meanwhile the asymmetric large optical cavity can decrease the cavity loss effectively. The epitaxial structure was grown by MOCVD, experimental results of varying cavity length showed that the internal quantum efficiency reached 98.57%, and the cavity loss was only 0.273 cm−1. Devices with 4 mm-cavity-length and 100 μm-strip-width were fabricated, 47.4% wall-plug efficiency was reached under QCW pulse condition at room temperature, and the peak wavelength was 1059.4 nm.


Introduction
1060 nm semiconductor lasers are an important light source in military, medical, spectroscopy, material processing and other fields.Compared with Nd:YAG system, 1060 nm semiconductor lasers have the advantage of small size, high efficiency and light weight.Therefore, a wide range of studies have been carried out on 1060 nm high power semiconductor lasers in China and abroad.For high power semiconductor lasers, power conversion efficiency is a very important technical indicator.For example, if the output optical power is 6 W, input power will be reduced from 15 W to 12 W when the power conversion efficiency is increased from 40% to 50%, which can reduce 3 W invalid heat.Invalid heat not only reduces the efficiency of the device, but also increases the requirement of the heat dissipation package, reducing the reliability and lifetime of the device.
Therefore, improving power conversion efficiency is a long-term research for high power semiconductor laser [1]- [4].
Factors affecting the power conversion efficiency of the semiconductor laser are multifaceted, including the internal quantum efficiency, cavity loss, series resistance, threshold current and effective heat dissipation packaging measures, etc. [5].By analyzing the factors affecting the power efficiency of the semiconductor laser, this paper designed the epitaxial structure of the high efficiency 1060 nm semiconductor laser, and carried out the fabrication of devices, then obtained the high power efficiency of the device.

The Structure Design of Device
The power efficiency of semiconductor laser η c is expressed as the ratio of output optical power and input electric power, I op is the device working current and U is the device working voltage.P opt and U can be expressed as [6], opt P ( ) η d is slope efficiency,η i is internal quantum efficiency, ω  is the photon energy, I th is threshold current den- sity, α m and α i are mirror loss and cavity loss, respectively.U d is intrinsic pressure drop, R s is the series resistance.Bring ( 2)-( 4) into (1), it can get: As it can be seen in Formula (5), in order to obtain high power conversion efficiency η c , device is required to have high internal quantum efficiency η i , low cavity loss α i , series resistor R s and threshold current I th .
Based on the principle above, we designed a high efficiency 1060 nm high power semiconductor laser epitaxial structure shown in Figure 1, which the active region adopt InGaAs/GaAs double quantum well (QW) structure and well spacing is 100 nm.In order to raise the COD standard, 2.2 µm asymmetric large optical cavity structure has been used, the waveguide layer material is non−intentionally doped GaAs, and GaAs waveguide layer thickness of the N-type and P-type side were 1.2 µm and 0.9 µm, light confinement layer material is Al 0.25 Ga 0.75 As.In order to reduce the series resistance of the device, insert a 0.1 µm thick Al x Ga 1−x As buffer layer between GaAs and Al 0.25 Ga 0.75 As confinement layer, and Al component x in a linear gradient change from 0 to 0.25 to reduce the voltage drop induced by the mutations heterojunction barrier.In addition, in the process of tube core fabrication, by using 100 µm wide strip and 4 mm long cavity length structure to increase Ohmic contact area, in order to decrease series resistance.The following focuses on discussing how to raising η i and lowering α i .There is not specific discussion about how to lowering I th because there are two point: i) For high power semiconductor lasers, working current I op is usually much larger than the threshold current I th , so in formula ( 5) I th has relatively small effect.
ii) raising η i and lowering α i is consistent.
Factors that affect internal quantum efficiency η i include carrier leakage, radiative recombination and composite interface states.For the structure shown in Figure 1, waveguide layer also plays the role of active region in QW barrier layer.Well region is compressive strain material of 1060 nm transition wavelength, which barrier layer material is GaAs.For the InGaAs/GaAs heterojunction, through the ratio of conduction and valence bands ∆Ec/∆Ev = 0.6/0.4[7] can estimate that the barrier height of electrons and holes are 152 meV and 101 meV at room temperature, The barrier layer can play a very good role in limiting the carriers in the well when 5.8 kT and 3.8 kT.
Therefore, leakage of carriers is negligible.But strained may lead to misfit dislocations of InGaAs, and thus result in non-radiative recombination and interface state complex, this must be considered when QW designing.Compared with 980 nm semiconductor laser, 1060 nm semiconductor laser's active region require In x Ga 1−x As with higher In component x.Therefore, for large strain materials In x Ga 1−x As which was grown on GaAs substrate, its thickness must be limited to less than a critical thickness that can avoid relaxation dislocation.Figure 2 shows the simulation result of the relation between the critical thickness of In x Ga 1−x As h c and In constituent x.Simulations used the formula given by Matthews and Blakeslee [8].With the increase of x, In x Ga 1−x As strain grown on GaAs substrate increase and the critical thickness of In x Ga 1−x As lawyer decreases.For biaxial compressive strain InGaAs material, the degeneracy of light and heavy hole band at the top of the valence band have eliminated, and the heavy-hole band is located above the light-hole band, therefore, the inter band transitions of InGaAs QW mainly occur between the first sub − level of conduction band E c1 and the first sub-level of valence band heavy hole E v1 .Figure 2 also shows the relation between QW well width w and the composition of In x when the transition wavelength between E c1 and E v1 fixed to 1060 nm.The specific simulation methods can be seen in document [9].
With the increase of x, In x Ga 1−x As band gap decline, in order to get the same transition wavelength, it must enhance the quantum size effect, which is decrease well width w.As is shown in Figure 2, though h c and w in- h c -w crease with the drop of x, w increased faster, especially when x < 0.28, w > h c , that mean the well width is larger than the critical thickness of the layer.Therefore, in order to get 1060nm transition wavelength, In component in In x Ga 1−x As must more than 28%.For epitaxial growth of strained materials, the more the strain layer thickness smaller than the critical thickness, the smaller the possibility of relaxation will be.For 1060 nm band transition wavelength, Figure 2 show relation between h c and x, w and x. h c and w get maximum value when x = 0.38.Although h c −w have maximum value when x = 0.38, but meanwhile the well width is only 3.6 nm, which is not easy to control in the actual extension process.Therefore in this paper the well width w is set to 6 nm, and the corresponding values of x is 0.315, the well width w is 75% of the corresponding values of h c .This can effectively avoid strain relaxation in the active region of the quantum well, then reduce the non-radiative recombination and the interface state recombination, and then the internal quantum efficiency can be improved.
In order to reduce the cavity loss, on the one hand, it is necessary to improve the extension quality of the material when the material was grown.On the other hand, it is necessary to design the structure of the waveguide.Figure 3 shows the transverse fundamental mode near − field distribution along the direction of extension of the device which was obtained by using transfer matrix method to simulate [10].Figure 3 also shows refractive index distribution near the active region.The selection of refractive index parameters in simulation can be seen in document [11].
Figure 3 shows that because it has adapt 2.2 µm large optical cavity structure, 99.4% of the light field are limited in the waveguide layer, thereby it greatly reduced the scattering and absorption losses introduced by doped confinement layer .
In addition, in the structure of device shown in Figure 1, we adapt the asymmetric waveguide structure, which the specific design can be seen in document [12].As it can be seen in Figure 3, because of asymmetric waveguide, light field peak shift to N−type waveguide side, in this way can reduce the light field distribution of P − type waveguide layer.Compare with electrons, holes have greater impact on scattering loss of light field, so it can effectively reduce the optical loss introduced by carriers by using asymmetric waveguide structure.

Devices Fabrication
As the device shown in Figure 1, we firstly use EMCORE D125 type MOCVD equipment for the epitaxial growth of the material.Group III source material are TMGa, TMAll and TMIn, Group V source material are high purity AsH 3 , N-type doping source is SiH 4 diluted by H 2 , P-type doping source is CCl 4 , carrier gas is high purity H 2 purified by palladium tube.Epitaxial temperature between 575˚C -675˚C, growth rate is 5 -7 Å/s.In order to ensure uniformity of the epitaxial, substrate rotate at high speed of 1000 rev/min.order of magnitude of electronic thermal energy kT at room temperature.This result shows that the quantum well material epitaxy has good quality.Fabricate wide strip ridge devices after cleaning the epitaxial wafers.At first, form ridge stage with 540 nm height and 100 m width through corrosion.Then sputter 200 nm SiO 2 and by using lithography to form 95 µm P-type electrode contact hole, after that, sputterg Ti/Au as the P-type electrode.Afterwards thin the substrate to 120 µm and sputter AuGe Ni/Au as the N side electrode.After alloy annealing, cleavage it into different cavity length dies and sinter In solder at C-mount heat sink to test.
Figure 5 shows the test results of differential quantum efficiency η d of different device cavity length, because there is a linear relationship between 1/η d and the cavity length L [12], the figure also shows linear fitting result between η d and the cavity length L [13].According to the fitting result, it can get internal quantum efficiency of the device η i is 98.57%, lumen loss α i just get 0.273 cm −1 , fully demonstrated the device structure design is reasonable.

Device Result
Cleave the chip into 4mm stripe for cavity surface coating, the reflectivity cavity surface and the high reflectivity cavity surface were 95% and 6% respectively.Then sintered single die and packaged in TO 3 socket to test.Because it has not adapt any specially cooling measures, such as water cooling or air cooling, test has been carried out at quasi-continuous pulse condition, which the pulse frequency is 50 Hz and the pulse width is 100 µs.
Figure 6 is result of the devices light output power P and voltage V which were measured at different current.In 8 A current, the optical power output is 6.884 W, the terminal voltage is 2.42 V, the series resistance is 0.15 Ω, slope efficiency is 0.942 W/A.The figure also shows the result of device power efficiency η c in different current.With high internal quantum efficiency and low cavity loss, at 2.64 A η c reached a maximum of 47.4%.By further optimizing the process to reduce the series resistance, the device is expected to further enhance performance.
In Figure 7, spectrum and device vertical far − field characteristics test result in 3 A working current were given in (a) and (b).Peak wavelength of the device is 1059.4nm, the spectral half width (FWHM) is 3 nm.As a result of the large optical cavity structure, in vertical direction 95% of peak vertical divergence angle is 49.8˚, 50% peak divergence angle is only 24.6˚, this is about to 30˚ for conventional semiconductor laser.

Conclusion
For the fibrication of highly efficient 1060 nm semiconductor laser, it needs to rationally design the quantum well active layer of the device, the waveguide layer and the confinement layer.The point of active layer design is to rise internal quantum efficiency, because the strain of InGaAs active layer is larger, its thickness must be   controlled in the critical thickness before dislocation relaxation occurs.The design of waveguide layer should consider reducing the cavity loss, and the symmetric waveguide of large optical cavity is an effective way of reducing the cavity losses.For confinement layer, in addition to doping, it will also pay attention to the transition between the GaAs contact layers to reduce the series resistance.Base on optimized device structure, material epitaxy, chip fabrication and package testing in this paper, we get 1060 nm semiconductor laser of 47.4% high power efficiency.At the same time, due to the large optical cavity structure, the vertical divergence angle of 50% peak is only 24.6˚.

Figure 1 .
Figure 1.The structure of 1060 nm semiconductor laser.

Figure 2 .
Figure 2. Relationship of well width and critical thickness with In mole fraction for In x Ga 1−x As QW.

Figure 4 Figure 3 .
Figure 3. Distribution of the refractive index and fundamental mode near field.

Figure 4 .
Figure 4. PL measurement result of In x Ga 1−x As QW.

Figure 5 .
Figure 5. Experimental and fitting results of varying cavity length.

Figure 6 .Figure 7 .
Figure 6.Measurement results of P − I and V − I characteristics.