Advances in Pure Mathematics

Vol.5 No.8(2015), Paper ID 57075, 14 pages

DOI:10.4236/apm.2015.58042

 

High Performance Novel Square Root Architecture Using Ancient Indian Mathematics for High Speed Signal Processing

 

Arindam Banerjee, Aniruddha Ghosh, Mainuck Das

 

Department of ECE, JIS College of Engineering, Kalyani, India
Department of ECE, JIS College of Engineering, Kalyani, India
Department of ECE, JIS College of Engineering, Kalyani, India

 

Copyright © 2015 Arindam Banerjee, Aniruddha Ghosh, Mainuck Das et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

 

How to Cite this Article


Banerjee, A. , Ghosh, A. and Das, M. (2015) High Performance Novel Square Root Architecture Using Ancient Indian Mathematics for High Speed Signal Processing. Advances in Pure Mathematics, 5, 428-441. doi: 10.4236/apm.2015.58042.

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