Circuits and Systems

Vol.7 No.10(2016), Paper ID 69847, 10 pages

DOI:10.4236/cs.2016.710257

 

On the Production Testing of Memristor Ratioed Logic (MRL) Gates

 

Ahmed Shukry Emara, Ahmed Hassan Madian, Hassanein Hamed Amer, Sherif Hassanein Amer, Mohamed Bakr Abdelhalim

 

Electronics and Communications Engineering, The American University in Cairo, Cairo, Egypt
Radiation Energy Department, Egyptian Atomic Energy Authority, Cairo, Egypt
Electronics and Communications Engineering, The American University in Cairo, Cairo, Egypt
Electronics and Communications Engineering, The American University in Cairo, Cairo, Egypt
College of Computing and Information Technology AASTMT, Cairo, Egypt

 

Copyright © 2016 Ahmed Shukry Emara, Ahmed Hassan Madian, Hassanein Hamed Amer, Sherif Hassanein Amer, Mohamed Bakr Abdelhalim et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

 

How to Cite this Article


Emara, A. , Madian, A. , Amer, H. , Amer, S. and Abdelhalim, M. (2016) On the Production Testing of Memristor Ratioed Logic (MRL) Gates. Circuits and Systems, 7, 3016-3025. doi: 10.4236/cs.2016.710257.

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