Engineering, 2009, 1, 1-54
Published Online June 2009 in SciRes (http://www.SciRP.org/journal/eng/).
Copyright © 2009 SciRes. Engineering, 2009, 1, 1-54
Fractional Sampling Improves Performance of UMTS
Code Acquisition
Francesco Benedetto, Gaetano Giunta
Department o f A p plied Electr o ni c s, Universi ty of ROMA TRE, R o m e, It a ly
Received March 31,2009; revised April 24,2009; accepted April 28, 2009
Abstract
An improved technique with a fractional sampling based on two samples per chip, according to the Nyquist
criterion, has been employed by the authors to enhance the performance in the code synchronization of
UMTS (or W-CDMA) systems. In this paper, we investigate on the theoretical rationale of such a promising
behavior. The performance is analyzed for several wireless channels, in the presence of typical pedestrian
and vehicular scenarios of the IMT2000/UMTS cellular systems.
Keywords: Code Synchronization, Spread Spectrum, Cell Search, UMTS, W-CDMA, Wireless Access
1. Introduction
Initial cell search in the wireless access of the Interna-
tional Mobile Telecommunications-2000/Universal Mo-
bile Telecommunications System (IMT2000/UMTS) is
the process of the mobile station that includes the search
for cell and scrambling codes as far as time synchroniza-
tion [1]. In fact, the whole synchronization process in
Wideband–Code Division Multiple Access (W-CDMA)
[2] consists of five sequential steps: 1) slot synchroniza-
tion; 2) frame synchronization and scrambling code
group identification; 3) scrambling code identification; 4)
frequency acquisition; 5) cell identification. This contri-
bution addresses algorithms for the initial cell search
before frequency acquisition, i.e. the stages 1-3. The
combined goal of such stages is to deliver a reliable
code-time candidate to the frequency acquisition stage.
Several sequential statistical tests were suggested for
such purposes [3-9]. In particular, effective non-coherent
sequential pseudo-noise (PN) code acquisition using
sliding correlation were proposed and analyzed for both
chip-asynchronous [7-8] and synchronous [9] direct se-
quence spread-spectrum (DS/SS) communications. Ac-
cording to such attempts, one testing variable is accumu-
lated after correlation (sometimes implemented as the
output of a matched filter) with each possible PN code
shifted by each code offset. That is, the decision device
sequentially examines all the code offsets of all the pos-
sible PN codes. The testing thresholds are optimally set
to provide the probability of detection and false alarm,
required for the considered application.
This paper extends previous analyses (e.g. [2]) that
made the simplifying assumption of one sample per chip.
Such choice appears motivated when a rectangular pulse
waveform is employed for spread-spectrum modulation,
since finer timing estimation can be confined to subse-
quent acquisition steps [3-4]. Nevertheless, the author of
the papers [7-8] already discussed some improvement
from over-sampling. Practical acquisition and signal
processing requires more than one sample per chip. In
fact, using only one sample could result in a significant
performance loss [10]. With a more appropriate discreti-
zation, we are considering the effect of time-sampling
the chip waveform (and the received signal) at twice the
chip rate on the performance of detection and acquisition
schemes. In fact, IMT2000/UMTS standard employs
raised-cosine spectral waveforms with non-zero roll-off
[1,11], and it is then necessary to use receivers based on
a fractional chip sampling, i.e. operating with more than
one sample per chip.
The remainder of this paper is organized as follows.
The use of fractional sampling to improve the perform-
ance of non-coherent sequential cell search procedure for
PN code acquisition is presented and discussed in Sec-

2 F. BENEDETTO ET AL.
Copyright © 2009 SciRes. Engineering, 2009, 1, 1-54
tion 2. The numerical results of the presented methods
for application to the initial cell search (before frequency
acquisition) of the IMT2000/UMTS cellular system is
examined in Section 3 by a number of numerical results.
Our conclusions are finally drawn in Section 4.
2. Improving the Code Synchronization by
Fractional Sampling
In this paper, we match the conventional method, based
on one sample per chip (like the operating cases reported
in [2]), to the fractional technique operating at twice the
chip rate. As already noted by [10], such choice matches
the Nyquist criterion. Unfortunately, this choice doubles
the computational complexity of receivers. Moreover,
they must operate twice faster than a conventional re-
ceiver. Nevertheless, the current trend, providing higher
and higher-speed microprocessors, is going to timely
compensate for the augmented request of computational
speed.
The author of the paper [7] already discussed some
improvement from over-sampling. In particular, that
original technique (“scheme 2” in [7]) implements the
sampling of the received signal at twice the chip rate, but
averages the samples at odd multiples of the half-chip
period before a subsequent decimation by the factor 2.
As a result, the final data clock is always synchronous
with the chip rate. In practice, the average operation of
the “scheme 2” in [7] as well as the matched filter corre-
lation by the “averaged” code ()ct in [8] are equiva-
lent to using the filter with impulse response h(t) =
[(t-Tc/2) + (t+Tc/2)] /2, corresponding to the low-pass
frequency response H(f) = cos(Tcf), before down-sam-
pling, where Tc is the chip period. In fact, it is well
known [12] that some kind of anti-aliasing filtering is
required before decimation to avoid the spectral alias
error, at the cost of missing the information at frequen-
cies higher than 1/2Tc (while the spectrum of a raised
cosine waveform is actually as large as (1+R)/2Tc, where
R is the roll-off). Unlike the method based on 2 sam-
ples/chip proposed in this paper, the effect of the
“scheme 2” in [7] is to filter out (or, at least, attenuate)
the (significant) signal components in all the transition
bandwidth [12], that is:
[(1-R)/2Tc,(1+R)/2Tc], because H(1/2Tc)=0.
In accordance with the logic scheme [7], let us con-
sider D samples of the complex envelope of the received
signal after the matched filter {r(iTc-Tc), i = 1, .., D},
discretized with the normalized timing offset , being
=0 (without loss of generality) in the chip-synchronous
case while (randomly distributed) -0.5≤
 ≤0.5 in chip-
asynchronous communications. The modified power de-
tector operating at twice the chip rate first estimates the
cross-correlation w(k’;) (despreading the generic w-th
data block made of D chips) between an over-sampled
(by the factor 2) version of the received signal r(t) after
the matched filter and the code candidate c(t) also for
half-chip offsets kTc:
2
*
1
1
(;)( /2- )( /2)
2
D
wccc
i
kr iTTciTkT
D

c
with k = -1.5,-1,-0.5,0, 0.5, 1, 1.5 (1)
As pointed out in [7], the correct timing offset is ran-
domly located (-0.5≤≤0.5) in a chip-asynchronous sys-
tem, being independent of the sampling times (either
integer or half-integer multiples of the chip period Tc).
As pointed out in [6], the worst case of erroneous syn-
chronization with the conventional power detector will
happen if the cross-correlation is computed for an offset
which is just in the middle between two chips. In such a
case, an error of half chip will affect the estimates. In our
method, the worst offset is located at Tc/4 instead of Tc/2.
In practice, the maximum offset error is the half of the
conventional detector. As a consequence, the worst case
can be modeled by testing the null hypothesis H0 against
the worst positive hypothesis with = Tc/2 (say H0.5), for
the conventional detector, and the worst positive hy-
pothesis with = T
c/4 (say H0.75) for the devised
over-sampled detector. In the conventional technique, the
“middle” hypothesis lies at = Tc/4 far from the correct
timing offset =0 (say H0.75), while the “middle” positive
hypothesis for the proposed approach is = Tc/8 far from
the correct offset=0 (say H0.875). It should be noted that
the half-chip offset (= T
c/2) correlation could have a
non-negligible impact on the acquisition performance.
Nevertheless, in full agreement with the approach by
Jia-Chin Lin [8], detecting the half-chip correlation sam-
ple (H0.5) is actually a metastable state that may some-
times lead to false-alarm conditions, but such conditions
can be very easily corrected in the next test immediately.
The mean acquisition time AT of a serial search proce-
dure over q cells (q>>1) is related to these probabilities
according the approximate expression [4-5]:
2
[]
2
D
TfaP
D
P
AqLPT
P

  (2)
where L=WDTc is the test’s duration for each code offset
candidate and Tp is the penalty time for an erroneous
acquisition while the signal does not actually exist. As a
consequence, the ratio of the mean acquisition times, say
AT1 and AT2, of two generic CFAR detectors with the
same duration L, that is:
11
21
(2 )
(2 )
TD
TD D
2
2
D
A
PP
A
PP


 (3)

F. BENEDETTO ET AL. 3
Copyright © 2009 SciRes. Engineering, 2009, 1, 1-54
is able to directly evidence the approximate gain in sav-
ing time (on the average) of the latter against the former
methods when the same signal data blocks are available.
3. Application to Initial Synchronization in
UMTS and Results
In the following of this paper, we are going to com-
pare the performance of the two methods with respect to
the “middle” synchronization conditions, considered here
as representative of the average operating conditions.
The results of our computer simulations, conversely as-
suming a uniform distribution of the timing offset, are
going to show that the “middle” case (defined for one
given “middle” offset) is representative of such a random
jitter of actual timing offsets.
In this section, we aim to show that the analyzed meth-
ods for code synchronization are applicable to the first
stages of initial cell search in the cellular UMTS system.
In particular, we are going to evidence that the analytic
expressions, reported in the previous sections, are able to
predict the achievable gain on the error probability and
the mean acquisition time of the over-sampled versus the
conventional method. The same scenarios as in [2] of
a) S NR = -2 0 d B
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
1.E-061.E-041.E-02 1.E+00
Pfa
Pd
b) SNR = -20 dB
0.4
0.5
0.6
0.7
0.8
0.9
1
1.E-061.E-041.E-02 1.E+00
Pfa
Pd
c) Pfa = 0.001
0.4
0.5
0.6
0.7
0.8
0.9
1
-20-18-16-14-12-10
SNR (dB)
Pd
d) Pfa = 0. 001
0.8
0.85
0.9
0.95
1
-20 -18 -16-14 -12 -10
SNR (dB)
Pd
Figures 1a-d. Analytic probability of detection versus the probability of false alarm (top: a,b) and the SNR value per chip
(bottom: c,d) in the “middle” offset case for a frequency uncertainty of 20 kHz (left: a,c) and 200 Hz (right: b,d), matching
the achieved performance of the conventional (squares) and over-sampled (triangles) methods for W=60 blocks of 64 chips
(10 ms).

4 F. BENEDETTO ET AL.
Copyright © 2009 SciRes. Engineering, 2009, 1, 1-54
cell search have been extensively studied. The frequency
errors of 20 kHz and 200 Hz, typical of the initial and the
target cell search, have been considered. In IMT2000/
UMTS [2], the pilot symbols available for code synchro-
nization consist of 256 consecutive chips per slot (each
slot is made of 2560 chips in total). The cross-correlation
performance of one and more groups of frames (each
made of 15 slots, i.e. 10 ms), as far as the overall syn-
chronization time in flat fading channels, has been ana-
lyzed. If one directly chooses D=256, the large frequency
error during the initial search results in a large incoher-
ence loss, especially in the initial search. This problem
b) Indoor to O utdoor, Pedestrian; Fe =
200 Hz
78
80
82
84
86
88
90
92
-20 -18 -16-14 -12 -10
SNR (dB)
Ratio (%) of mean acqu isition
time
d) Veh icular; Fe = 200 Hz
78
80
82
84
86
88
90
92
-20-18 -16-14 -12-10
SNR (dB)
Ratio (%) of me an acqu isition
time
a) Ind oo r to Ou td o o r, Pedestria n; Fe =
20 kHz
78
80
82
84
86
88
90
92
-20 -18-16 -14-12 -10
SNR (dB)
Ratio (% ) of mean acquisition
time
c) Vehicular; Fe = 20 kHz
78
80
82
84
86
88
90
92
-20 -18-16 -14-12 -10
SNR (dB)
Ratio (%) of mean acquisition
time
Figures 2a-d. Ratio of the experimental mean acquisition time of fractional and conventional procedures in the three initial
stages (stage 1: diamonds; stage 2: squares; stage 3 triangles) versus the SNR per chip for pedestrian (top: a, b) and vehicular
(bottom: c,d) scenarios with a random timing jitter for a frequency uncertainty of 20 kHz (left: a,c) and 200 Hz (right: b,d).

F. BENEDETTO ET AL. 5
C opyright © 2009 SciRes. Engineering, 2009, 1, 1-54
is solved by partial symbol despreading [2], using
blocks of D=64 contiguous chips and non-coherent
combining. In particular, the first stage of initial code
synchronization provides a number of possible candi-
dates of code offsets to the following one [2]. As a con-
sequence, a sequential test can be implemented for such
a purpose, performed like the procedure described in
the former part of this paper. In the following (second
and third) stages, only the most reliable code candidate
is detected and finally processed by the frequency ac-
quisition system [2].
The probability of detection in the “middle” synchro-
nization case of the timing offset, defined in the previous
section, is derived from the analytic expressions and de-
picted in figures 1a-d versus the probability of fal-
sealarm and the SNR for the two methods, in order to
assess the validity of the over-sampled testing procedure
in the presence of frequency uncertainties. The results of
computer simulations, obtained with a uniformly distrib-
uted random jitter, have confirmed such trend. For sake
of comparison, we have assumed the same typical pedes-
trian and vehicular scenarios reported in [2]. In particular,
a uniformly distributed random timing jitter has been
considered while the channel is affected by flat fading
and three paths have been simulated, depending on the
kind of scenario. Namely, pedestrian (speed: 3 Km/h):
the first path is 0 dB with delay =0 ns, the second one 0
dB and delay=976 ns, third one 0 dB and delay =20000
ns; vehicular (speed: 120 km/h): the main path is 0 dB
with delay 0 ns, the second one -3 dB and delay =260 ns
and the third one is -6 dB and delay =521 ns. Two possi-
ble constant frequency errors in the initial and target
search [2] procedure (namely, 20 kHz and 200 Hz) are
considered. In particular, the figures 2a-d show the ratio
of the mean acquisition time of the two methods versus
the SNR per chip, obtained by Monte-Carlo simulations
of the two reference wireless channels of [2] for
Pfa=0.001, for the three initial stages of the serial code
acquisition in UMTS.
Moreover, the same authors of this paper showed in
[13], by extensive computer simulations, that the new
scheme outperforms the conventional approach analyz-
ing also the overall acquisition performance of the
scrambling code, then including all the three steps of the
initial synchronization procedure (before frequency ac-
quisition). The authors, in [13], evidenced the significant
real-time saving of the mean acquisition time (from 12%
to 21%) of the suggested procedure, compared to the
conventional technique, in the presence of multi-path
channels with flat fading and frequency inaccuracy. In
practice, the benefits on the mean acquisition time of
using two samples per chip, since the first stage of code
synchronization, are twofold: first, the cross-correlation
between the received signal and the code’s candidates
are better estimated, then increasing the testing power of
stage 1 (i.e. probability of correct detection for a constant
false alarm rate); second, the timing error provided to the
stages 2 and 3 is ideally the half of the conventional
technique, being maximized by one fourth of the chip
period.
4. Conclusions
This paper has addressed algorithms for initial code
synchronization by sequential cell search, suited for ap-
plication to the first three stages of the IMT2000/UMTS
cellular wireless access system, i.e. initial cell search
before frequency acquisition. The basic testing method,
based on one sample per chip, has been herein matched
to an improved technique based on a fractional chip
sampling (and processing) that operates at twice the chip
rate, according to the Nyquist criterion. The simulation
analyses have evidenced a significant reduction of the
mean acquisition time by the suggested procedure, com-
pared to the conventional technique. In perspective, ex-
ploiting the half-chip offset correlation (by devising new
well-performing testing variables) could further improve
these schemes.
5. Acknowledgments
The authors wish to thank Prof. A. Neri and Dr. M. Carli
of the University of Roma Tre for their support on the
preliminary trials of numerical analysis and further dis-
cussions on application to 3G Mobile Systems.
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