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Implementation of High Performance Electronic Circuits for Zero Suppression and Encoding of Digital Signals

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DOI: 10.4236/jsip.2015.63022    3,763 Downloads   4,101 Views  


This paper presents a design of a data processing circuit for receiving digital signals from front end-electronic board chips of a specific nuclear detector, encoding and triggering them via specific optical links operating at a specific frequency. Such processed signals are then fed to a data acquisition system (DAQ) for analysis. Very high-speed integrated circuit hardware description language (VHDL) algorithms and codes were created to implement this design using field programmable gate array (FPGA) devices. The obtained data were simulated using international standard simulators.

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The authors declare no conflicts of interest.

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Yahia, A. , Radi, A. and Youssef, S. (2015) Implementation of High Performance Electronic Circuits for Zero Suppression and Encoding of Digital Signals. Journal of Signal and Information Processing, 6, 238-243. doi: 10.4236/jsip.2015.63022.


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