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An IEEE 1149.x Embedded Test Coprocessor

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DOI: 10.4236/cs.2014.57019    3,498 Downloads   4,475 Views   Citations

ABSTRACT

This paper describes a microprogrammed architecture for an embedded coprocessor that is able to control IEEE 1149.1 to IEEE 1149.7 test infrastructures, and explains how to expand the supported test command set. The coprocessor uses a fast simplex link (FSL) channel to interface a 32-bit MicroBlaze CPU, but it can work with any microprocessor core that accepts this simple FIFO-based interface method. The implementation cost (logic resource usage for a Xilinx Spartan-6 FPGA) and the performance data (operating frequency) are presented for a test command set comprising two parts: 1) the full IEEE 1149.1 structural test operations; 2) a subset of IEEE 1149.7 operations selected to illustrate the implementation of advanced scan formats.

Conflicts of Interest

The authors declare no conflicts of interest.

Cite this paper

Gebremeskel, U. and Ferreira, J. (2014) An IEEE 1149.x Embedded Test Coprocessor. Circuits and Systems, 5, 170-180. doi: 10.4236/cs.2014.57019.

References

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