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An implantable electrical stimulator for phrenic nerve stimulation

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DOI: 10.4236/jbise.2012.53018    3,304 Downloads   5,890 Views   Citations

ABSTRACT

Phrenic nerve stimulation is a technique whereby a nerve stimulator provides electrical stimulation of the phrenic nerve to cause diaphragmatic contraction in patients with respiratory failure due to cervical spinal cord injury. This paper presents an eigth-channel stimulator circuit with an output stage (electrode driving circuit) that doesn’t need off-chip blocking-capacitors and is used for phrenic nerve stimulation. This stimulator circuit utilizes only 1 output stage for 8 channels. The proposed current generator circuit in this stimulator reducing to a single step the translation of the digital input bits into the stimulus current, thus minimizing silicon area and power consumption. An 8 bit implementation is utilized for this current generator circuit. The average pulse width for this eight- channel stimulator with 1 mA current, 20 Hz frequency and 8 bits resolution, is 150 - 300 μs. The average power consumption for a single-channel stimulation is 38 mW from a 1.2 V power supply. This implantable stimulator system was simulated in HSPICE using 90 nm CMOS technology.

Conflicts of Interest

The authors declare no conflicts of interest.

Cite this paper

Sardarzadeh, S. and Pooyan, M. (2012) An implantable electrical stimulator for phrenic nerve stimulation. Journal of Biomedical Science and Engineering, 5, 141-145. doi: 10.4236/jbise.2012.53018.

References

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[3] Khong, P., Lazzaro, A. and Mobbs, R. (2010) Phrenic nerve stimulation: The Australian experience. Journal of Clinical Neuroscience, 17, 205-208. doi:10.1016/j.jocn.2009.06.012
[4] Liu, X., Demosthenous, A. and Donaldson, N. (2007) A fully integrated fail-safe stimulator output stage dedicated to FES stimulation. IEEE International Symposium on Circuits and Systems, New Orleans, 27-30 May 2007, 2076-2079. doi:10.1109/ISCAS.2007.378507
[5] Liu, X., Demosthenous, A. and Donaldson, N. (2008) An integrated implantable stimulator that is fail-safe without off-chip blocking-capacitors. IEEE Transactions on Biomedical Circuits and Systems, 2, 3.

  
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