TITLE:
Design of a Low Power Low-Noise Amplifier with Improved Gain/Noise Ratio
AUTHORS:
Raja Mahmou, Khalid Faitah
KEYWORDS:
LNA, Degeneracy, Noise Figure, Linearity, Power Consumption, Gain
JOURNAL NAME:
World Journal of Engineering and Technology,
Vol.12 No.1,
January
26,
2024
ABSTRACT: This
work details the development of a broad-spectrum LNA (Low Noise Amplifier)
circuit using a 65 nm CMOS technology. The design incorporates an inductive degeneracy
circuit, employing a theoretical approach to enhance gain, minimize noise
levels, and uphold low power consumption. The progression includes a shift to a
cascode structure to further refine LNA parameters. Ultimately, with a 1.8 V bias,
the achieved performance showcases a gain-to-noise figure ratio of 16 dB/0.5
dB, an IIP3 linearity at 5.1 dBm, and a power consumption of 3 mW. This
architecture is adept at operating across a wide frequency band spanning from
0.5 GHz to 6 GHz, rendering it applicable in diverse RF scenarios.