Chouksey, S., Fossum, J.G. and Agrawal, S. (2010) Insights on Design and Scalability of Thin-BOX FD/SOI CMOS. IEEE Transactions on Electron Devices, 57, 2073-2079.
https://doi.org/10.1109/TED.2010.2052420

has been cited by the following article:

• TITLE: Simulation Study of Nanoscale FDSOI MOSFET Characteristics

  AUTHORS: Towhid Adnan Chowdhury

  KEYWORDS: Fully Depleted, Silicon on Insulator, Threshold Voltage, Subthreshold Slope, Leakage Current, Gate Length

  JOURNAL NAME: Soft Nanoscience Letters, Vol.13 No.3, July 19, 2023

  ABSTRACT: Silicon on insulator (SOI) technology permits a good solution to the miniaturization as the MOSFET size scales down. This paper is about to compare the electrical performance of nanoscale FD-SOI MOSFET at various gate lengths. The performance is compared and contrasted with the help of threshold voltage, subthreshold slope, on-state current and leakage current. Interestingly, by decreasing the gate length, the leakage current and on-state current are increased but the threshold voltage is decreased and the sub-threshold slope is degraded. Silvaco two-dimensional simulations are used to analyze the performance of the proposed structures.