TITLE:
Data Intelligent Low Power High Performance TCAM for IP-Address Lookup Table
AUTHORS:
K. Mathan, T. Ravichandran
KEYWORDS:
Low Power, TCAM, Switching Power, Match Line, Searchline, Data Aware and Speech Processing
JOURNAL NAME:
Circuits and Systems,
Vol.7 No.11,
September
16,
2016
ABSTRACT: This paper represents
current research in low-power Very Large Scale Integration (VLSI) domain. Nowadays
low power has become more sought research topic in electronic industry. Power
dissipation is the most important area while designing the VLSI chip. Today almost all of the high speed switching devices include the Ternary
Content Addressable Memory (TCAM)
as one of the most important features. When a
device consumes less power that becomes reliable and it would work with more
efficiency. Complementary Metal Oxide Semiconductor (CMOS) technology is best known for low power
consumption devices. This paper aims at designing a router application device which consumes less power and
works more efficiently. Various strategies, methodologies and power
management techniques for low power circuits and systems are discussed in this
research. From this research the challenges could be developed that might be
met while designing low power high performance circuit. This work aims at developing Data Aware
AND-type match line architecture for TCAM. A TCAM macro of 256 × 128 was designed using
Cadence Advanced Development Environment (ADE) with 90 nm technology file from Taiwan Semiconductor
Manufacturing Company (TSMC). The result shows that the proposed Data Aware
architecture provides around 35% speed and 45% power improvement over existing
architecture.