ARM (2013) Neon, ARM. http://www.arm.com/products/processors/technologies/neon.php

has been cited by the following article:

• TITLE: Parallelized Hashing via j-Lanes and j-Pointers Tree Modes, with Applications to SHA-256

  AUTHORS: Shay Gueron

  KEYWORDS: Tree Mode Hashing, SHA-256, SIMD Architecture, Advanced Vector Extensions Architectures, AVX, AVX2

  JOURNAL NAME: Journal of Information Security, Vol.5 No.3, July 17, 2014

  ABSTRACT: j-lanes tree hashing is a tree mode that splits an input message intojslices, computesjindependent digests of each slice, and outputs the hash value of their concatenation.j-pointers tree hashing is a similar tree mode that receives, as input,jpointers tojmessages (or slices of a single message), computes their digests and outputs the hash value of their concatenation. Such modes expose parallelization opportunities in a hashing process that is otherwise serial by nature. As a result, they have a performance advantage on modern processor architectures. This paper provides precise specifications for these hashing modes, proposes appropriate IVs, and demonstrates their performance on the latest processors. Our hope is that it would be useful for standardization of these modes.