Author(s)

M. S. Saravanan^1*, R. Jeyabharath²

¹Department of ECE, Mahendra College of Engineering, Salem, India.
²Department of EEE, KSR Institute for Engineering and Technology, Tiruchengode, India.

This work presents an implementation of an innovative single phase multilevel inverter using capacitors with reduced switches. The proposed Capacitor pattern H-bridge Multilevel Inverter (CPHMLI) topology consists of a proper number of Capacitor connected with switches and power sources. The advanced switching control supplied by Pulse Width Modulation (PDPWM) to attain mixed staircase switching state. The charging and discharging mode are achieved by calculating the voltage error at the load. Furthermore, to accomplish the higher voltage levels at the output with less number of semiconductors switches and simple commutation designed using CPHMLI topology. To prove the performance and effectiveness of the proposed approach, a set of experiments performed under various load conditions using MATLAB tool.

Switched Capacitor Multilevel Inverter, Phase Diposition Pulse Width Modulation, Capacitor Pattern Based Multilevel Inverter, Total Harmonic Distortion, Cascaded H-Bridge, 17-Level Inverter

Saravanan, M. and Jeyabharath, R. (2016) Capacitor Pattern H-Bridge Multilevel Inverter (CPHMLI) Using Phase Diposition Pulse Width Modulation for Grid Applications. Circuits and Systems, 7, 3310-3319. doi: 10.4236/cs.2016.710282.