Circuits and Systems

Circuits and Systems

ISSN Print: 2153-1285
ISSN Online: 2153-1293
www.scirp.org/journal/cs
E-mail: cs@scirp.org
"A Novel High-Performance Lekage-Tolerant, Wide Fan-In Domino Logic Circuit in Deep-Submicron Technology"
written by Ajay Dadoria, Kavita Khare, T. K. Gupta, R. P. Singh,
published by Circuits and Systems, Vol.6 No.4, 2015
has been cited by the following article(s):
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[1] A Study of Leakage and Noise Tolerant Wide Fan-in OR Logic Domino Circuits
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[2] A Charge-Accumulation Based High-Performance CMOS Circuit
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[3] Design of low power fast full adder using Domino Logic based on magnetic tunnel junction (MTJ) and memristor
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[4] Leakage Power Reduction in High Speed Domino Logic Circuits in Deep Submicron Technologies for VLSI Applications
2020
[5] A 4: 1 multiplexer using low-power high-speed domino technique for large fan-in gates using FinFET
2020
[6] SCDNDTDL: a technique for designing low-power domino circuits in FinFET technology
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[7] Design of High Speed and Low Power Domino Logic Circuits for Wide Fan-in gates”
2019
[8] FDSTDL: Low‐power technique for FinFET domino circuits
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[9] A novel approach for noise tolerant energy efficient TSPC dynamic circuit design
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[10] Design and implementation of low-power CMOS biosignal amplifier for active electrode in biomedical application using subthreshold biasing strategy
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[11] Low power domino logic circuits in deep-submicron technology using CMOS
Engineering Science and Technology, an International Journal, 2018
[12] Estimation and Analysis of Novel Dynamic Body Biased TSPC Design Technique
MAPAN, 2018
[13] A new technique for designing low power high-speed domino logic circuits in FinFET technology
Journal of Circuits, Systems, and Computers, 2018
[14] Performance Analysis of Domino Logic Circuits for High-Performance and Low Leakage
Programmable Device Circuits and Systems, 2015
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